Commit e045f044 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo

arm64: dts: imx8mq: Move usdhc clocks assignment to board DT

usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT according to different devices connected on each usdhc port.
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 3944b454
...@@ -278,6 +278,8 @@ &usb_dwc3_1 { ...@@ -278,6 +278,8 @@ &usb_dwc3_1 {
}; };
&usdhc1 { &usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
...@@ -291,6 +293,8 @@ &usdhc1 { ...@@ -291,6 +293,8 @@ &usdhc1 {
}; };
&usdhc2 { &usdhc2 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
......
...@@ -110,6 +110,8 @@ &uart3 { /* Mikrobus */ ...@@ -110,6 +110,8 @@ &uart3 { /* Mikrobus */
}; };
&usdhc2 { &usdhc2 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
......
...@@ -780,6 +780,8 @@ &usb_dwc3_1 { ...@@ -780,6 +780,8 @@ &usb_dwc3_1 {
}; };
&usdhc1 { &usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
...@@ -790,6 +792,8 @@ &usdhc1 { ...@@ -790,6 +792,8 @@ &usdhc1 {
}; };
&usdhc2 { &usdhc2 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
......
...@@ -191,6 +191,8 @@ &uart2 { ...@@ -191,6 +191,8 @@ &uart2 {
}; };
&usdhc1 { &usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
bus-width = <8>; bus-width = <8>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
......
...@@ -207,6 +207,8 @@ &uart1 { /* console */ ...@@ -207,6 +207,8 @@ &uart1 { /* console */
}; };
&usdhc1 { &usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
...@@ -217,6 +219,8 @@ &usdhc1 { ...@@ -217,6 +219,8 @@ &usdhc1 {
}; };
&usdhc2 { &usdhc2 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
......
...@@ -170,6 +170,8 @@ &uart4 { /* ublox BT */ ...@@ -170,6 +170,8 @@ &uart4 { /* ublox BT */
}; };
&usdhc1 { &usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
......
...@@ -512,6 +512,8 @@ &pgc_vpu { ...@@ -512,6 +512,8 @@ &pgc_vpu {
}; };
&usdhc1 { &usdhc1 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
...@@ -525,6 +527,8 @@ &usdhc1 { ...@@ -525,6 +527,8 @@ &usdhc1 {
}; };
&usdhc2 { &usdhc2 {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
......
...@@ -868,8 +868,6 @@ usdhc1: mmc@30b40000 { ...@@ -868,8 +868,6 @@ usdhc1: mmc@30b40000 {
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>, <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC1_ROOT>; <&clk IMX8MQ_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
fsl,tuning-start-tap = <20>; fsl,tuning-start-tap = <20>;
fsl,tuning-step = <2>; fsl,tuning-step = <2>;
bus-width = <4>; bus-width = <4>;
......
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