Commit e0bd878a authored by Manasi Navare's avatar Manasi Navare Committed by Jani Nikula

drm/dp: Add HBR3 support in existing DRM DP helpers

Existing helpers add support upto HBR2. This patch
adds support for HBR3 rate (8.1 Gbps) introduced as
part of DP 1.4 specification.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1516660991-20697-1-git-send-email-manasi.d.navare@intel.com
parent a35f2f34
...@@ -146,6 +146,8 @@ u8 drm_dp_link_rate_to_bw_code(int link_rate) ...@@ -146,6 +146,8 @@ u8 drm_dp_link_rate_to_bw_code(int link_rate)
return DP_LINK_BW_2_7; return DP_LINK_BW_2_7;
case 540000: case 540000:
return DP_LINK_BW_5_4; return DP_LINK_BW_5_4;
case 810000:
return DP_LINK_BW_8_1;
} }
} }
EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
...@@ -161,6 +163,8 @@ int drm_dp_bw_code_to_link_rate(u8 link_bw) ...@@ -161,6 +163,8 @@ int drm_dp_bw_code_to_link_rate(u8 link_bw)
return 270000; return 270000;
case DP_LINK_BW_5_4: case DP_LINK_BW_5_4:
return 540000; return 540000;
case DP_LINK_BW_8_1:
return 810000;
} }
} }
EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
......
...@@ -2087,6 +2087,9 @@ static bool drm_dp_get_vc_payload_bw(int dp_link_bw, ...@@ -2087,6 +2087,9 @@ static bool drm_dp_get_vc_payload_bw(int dp_link_bw,
case DP_LINK_BW_5_4: case DP_LINK_BW_5_4:
*out = 10 * dp_link_count; *out = 10 * dp_link_count;
break; break;
case DP_LINK_BW_8_1:
*out = 15 * dp_link_count;
break;
} }
return true; return true;
} }
......
...@@ -334,6 +334,7 @@ ...@@ -334,6 +334,7 @@
# define DP_LINK_BW_1_62 0x06 # define DP_LINK_BW_1_62 0x06
# define DP_LINK_BW_2_7 0x0a # define DP_LINK_BW_2_7 0x0a
# define DP_LINK_BW_5_4 0x14 /* 1.2 */ # define DP_LINK_BW_5_4 0x14 /* 1.2 */
# define DP_LINK_BW_8_1 0x1e /* 1.4 */
#define DP_LANE_COUNT_SET 0x101 #define DP_LANE_COUNT_SET 0x101
# define DP_LANE_COUNT_MASK 0x0f # define DP_LANE_COUNT_MASK 0x0f
......
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