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Commit e0c7d767 authored by David Woodhouse's avatar David Woodhouse
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[MTD NAND] Indent all of drivers/mtd/nand/*.c. 

It was just too painful to deal with.
Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
parent 6943f8af
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Showing with 1217 additions and 1292 deletions
drivers/mtd/nand/au1550nd.c
View file @ e0c7d767
......@@ -38,22 +38,20 @@
*/
static struct mtd_info *au1550_mtd = NULL;
static void __iomem *p_nand;
static int nand_width = 1; /* default x8*/
static int nand_width = 1; /* default x8 */
/*
* Define partitions for flash device
*/
static const struct mtd_partition partition_info[] = {
{
.name = "NAND FS 0",
.offset = 0,
.size = 8*1024*1024
},
.name = "NAND FS 0",
.offset = 0,
.size = 8 * 1024 * 1024},
{
.name = "NAND FS 1",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL
}
.name = "NAND FS 1",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL}
};
/**
......@@ -157,7 +155,7 @@ static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
int i;
struct nand_chip *this = mtd->priv;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++) {
writeb(buf[i], this->IO_ADDR_W);
au_sync();
}
......@@ -176,7 +174,7 @@ static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len)
int i;
struct nand_chip *this = mtd->priv;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++) {
buf[i] = readb(this->IO_ADDR_R);
au_sync();
}
......@@ -195,7 +193,7 @@ static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
int i;
struct nand_chip *this = mtd->priv;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++) {
if (buf[i] != readb(this->IO_ADDR_R))
return -EFAULT;
au_sync();
......@@ -219,7 +217,7 @@ static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
u16 *p = (u16 *) buf;
len >>= 1;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++) {
writew(p[i], this->IO_ADDR_W);
au_sync();
}
......@@ -241,7 +239,7 @@ static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
u16 *p = (u16 *) buf;
len >>= 1;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++) {
p[i] = readw(this->IO_ADDR_R);
au_sync();
}
......@@ -262,7 +260,7 @@ static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
u16 *p = (u16 *) buf;
len >>= 1;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++) {
if (p[i] != readw(this->IO_ADDR_R))
return -EFAULT;
au_sync();
......@@ -275,27 +273,35 @@ static void au1550_hwcontrol(struct mtd_info *mtd, int cmd)
{
register struct nand_chip *this = mtd->priv;
switch(cmd){
switch (cmd) {
case NAND_CTL_SETCLE:
this->IO_ADDR_W = p_nand + MEM_STNAND_CMD;
break;
case NAND_CTL_CLRCLE:
this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
break;
case NAND_CTL_SETCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; break;
case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break;
case NAND_CTL_SETALE:
this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR;
break;
case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break;
case NAND_CTL_CLRALE:
this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
/* FIXME: Nobody knows why this is neccecary,
/* FIXME: Nobody knows why this is necessary,
* but it works only that way */
udelay(1);
break;
case NAND_CTL_SETNCE:
/* assert (force assert) chip enable */
au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break;
au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL);
break;
case NAND_CTL_CLRNCE:
/* deassert chip enable */
au_writel(0, MEM_STNDCTL); break;
/* deassert chip enable */
au_writel(0, MEM_STNDCTL);
break;
}
......@@ -315,66 +321,63 @@ int au1550_device_ready(struct mtd_info *mtd)
/*
* Main initialization routine
*/
int __init au1xxx_nand_init (void)
int __init au1xxx_nand_init(void)
{
struct nand_chip *this;
u16 boot_swapboot = 0; /* default value */
u16 boot_swapboot = 0; /* default value */
int retval;
u32 mem_staddr;
u32 nand_phys;
/* Allocate memory for MTD device structure and private data */
au1550_mtd = kmalloc (sizeof(struct mtd_info) +
sizeof (struct nand_chip), GFP_KERNEL);
au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!au1550_mtd) {
printk ("Unable to allocate NAND MTD dev structure.\n");
printk("Unable to allocate NAND MTD dev structure.\n");
return -ENOMEM;
}
/* Get pointer to private data */
this = (struct nand_chip *) (&au1550_mtd[1]);
this = (struct nand_chip *)(&au1550_mtd[1]);
/* Initialize structures */
memset((char *) au1550_mtd, 0, sizeof(struct mtd_info));
memset((char *) this, 0, sizeof(struct nand_chip));
memset(au1550_mtd, 0, sizeof(struct mtd_info));
memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
au1550_mtd->priv = this;
/* disable interrupts */
au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
au_writel(au_readl(MEM_STNDCTL) & ~(1 << 8), MEM_STNDCTL);
/* disable NAND boot */
au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
au_writel(au_readl(MEM_STNDCTL) & ~(1 << 0), MEM_STNDCTL);
#ifdef CONFIG_MIPS_PB1550
/* set gpio206 high */
au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR);
au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR);
boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
((bcsr->status >> 6) & 0x1);
boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1);
switch (boot_swapboot) {
case 0:
case 2:
case 8:
case 0xC:
case 0xD:
/* x16 NAND Flash */
nand_width = 0;
break;
case 1:
case 9:
case 3:
case 0xE:
case 0xF:
/* x8 NAND Flash */
nand_width = 1;
break;
default:
printk("Pb1550 NAND: bad boot:swap\n");
retval = -EINVAL;
goto outmem;
case 0:
case 2:
case 8:
case 0xC:
case 0xD:
/* x16 NAND Flash */
nand_width = 0;
break;
case 1:
case 9:
case 3:
case 0xE:
case 0xF:
/* x8 NAND Flash */
nand_width = 1;
break;
default:
printk("Pb1550 NAND: bad boot:swap\n");
retval = -EINVAL;
goto outmem;
}
#endif
......@@ -424,14 +427,13 @@ int __init au1xxx_nand_init (void)
/* make controller and MTD agree */
if (NAND_CS == 0)
nand_width = au_readl(MEM_STCFG0) & (1<<22);
nand_width = au_readl(MEM_STCFG0) & (1 << 22);
if (NAND_CS == 1)
nand_width = au_readl(MEM_STCFG1) & (1<<22);
nand_width = au_readl(MEM_STCFG1) & (1 << 22);
if (NAND_CS == 2)
nand_width = au_readl(MEM_STCFG2) & (1<<22);
nand_width = au_readl(MEM_STCFG2) & (1 << 22);
if (NAND_CS == 3)
nand_width = au_readl(MEM_STCFG3) & (1<<22);
nand_width = au_readl(MEM_STCFG3) & (1 << 22);
/* Set address of hardware control function */
this->hwcontrol = au1550_hwcontrol;
......@@ -454,7 +456,7 @@ int __init au1xxx_nand_init (void)
this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
/* Scan to find existence of the device */
if (nand_scan (au1550_mtd, 1)) {
if (nand_scan(au1550_mtd, 1)) {
retval = -ENXIO;
goto outio;
}
......@@ -465,10 +467,10 @@ int __init au1xxx_nand_init (void)
return 0;
outio:
iounmap ((void *)p_nand);
iounmap((void *)p_nand);
outmem:
kfree (au1550_mtd);
kfree(au1550_mtd);
return retval;
}
......@@ -478,19 +480,20 @@ module_init(au1xxx_nand_init);
* Clean up routine
*/
#ifdef MODULE
static void __exit au1550_cleanup (void)
static void __exit au1550_cleanup(void)
{
struct nand_chip *this = (struct nand_chip *) &au1550_mtd[1];
struct nand_chip *this = (struct nand_chip *)&au1550_mtd[1];
/* Release resources, unregister device */
nand_release (au1550_mtd);
nand_release(au1550_mtd);
/* Free the MTD device structure */
kfree (au1550_mtd);
kfree(au1550_mtd);
/* Unmap */
iounmap ((void *)p_nand);
iounmap((void *)p_nand);
}
module_exit(au1550_cleanup);
#endif
......
drivers/mtd/nand/autcpu12.c
View file @ e0c7d767
......@@ -47,7 +47,7 @@ static int autcpu12_io_base = CS89712_VIRT_BASE;
static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET;
static void __iomem * autcpu12_fio_base;
static void __iomem *autcpu12_fio_base;
/*
* Define partitions for flash devices
......@@ -95,10 +95,10 @@ static struct mtd_partition partition_info128k[] = {
/*
* hardware specific access to control-lines
*/
static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
{
switch(cmd){
switch (cmd) {
case NAND_CTL_SETCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |= AUTCPU12_SMC_CLE; break;
case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break;
......@@ -117,41 +117,40 @@ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
int autcpu12_device_ready(struct mtd_info *mtd)
{
return ( (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;
return ((*(volatile unsigned char *)(autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;
}
/*
* Main initialization routine
*/
int __init autcpu12_init (void)
int __init autcpu12_init(void)
{
struct nand_chip *this;
int err = 0;
/* Allocate memory for MTD device structure and private data */
autcpu12_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
GFP_KERNEL);
autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!autcpu12_mtd) {
printk ("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}
/* map physical adress */
autcpu12_fio_base = ioremap(autcpu12_fio_pbase,SZ_1K);
if(!autcpu12_fio_base){
autcpu12_fio_base = ioremap(autcpu12_fio_pbase, SZ_1K);
if (!autcpu12_fio_base) {
printk("Ioremap autcpu12 SmartMedia Card failed\n");
err = -EIO;
goto out_mtd;
}
/* Get pointer to private data */
this = (struct nand_chip *) (&autcpu12_mtd[1]);
this = (struct nand_chip *)(&autcpu12_mtd[1]);
/* Initialize structures */
memset((char *) autcpu12_mtd, 0, sizeof(struct mtd_info));
memset((char *) this, 0, sizeof(struct nand_chip));
memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
autcpu12_mtd->priv = this;
......@@ -167,35 +166,34 @@ int __init autcpu12_init (void)
/* Enable the following for a flash based bad block table */
/*
this->options = NAND_USE_FLASH_BBT;
*/
this->options = NAND_USE_FLASH_BBT;
*/
this->options = NAND_USE_FLASH_BBT;
/* Scan to find existance of the device */
if (nand_scan (autcpu12_mtd, 1)) {
if (nand_scan(autcpu12_mtd, 1)) {
err = -ENXIO;
goto out_ior;
}
/* Register the partitions */
switch(autcpu12_mtd->size){
switch (autcpu12_mtd->size) {
case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break;
case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break;
case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break;
case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break;
default: {
printk ("Unsupported SmartMedia device\n");
default:
printk("Unsupported SmartMedia device\n");
err = -ENXIO;
goto out_ior;
}
}
goto out;
out_ior:
out_ior:
iounmap((void *)autcpu12_fio_base);
out_mtd:
kfree (autcpu12_mtd);
out:
out_mtd:
kfree(autcpu12_mtd);
out:
return err;
}
......@@ -205,17 +203,18 @@ module_init(autcpu12_init);
* Clean up routine
*/
#ifdef MODULE
static void __exit autcpu12_cleanup (void)
static void __exit autcpu12_cleanup(void)
{
/* Release resources, unregister device */
nand_release (autcpu12_mtd);
nand_release(autcpu12_mtd);
/* unmap physical adress */
iounmap((void *)autcpu12_fio_base);
/* Free the MTD device structure */
kfree (autcpu12_mtd);
kfree(autcpu12_mtd);
}
module_exit(autcpu12_cleanup);
#endif
......
drivers/mtd/nand/cs553x_nand.c
View file @ e0c7d767
......@@ -50,7 +50,7 @@
/* Pin function selection MSR (IDE vs. flash on the IDE pins) */
#define MSR_DIVIL_BALL_OPTS 0x51400015
#define PIN_OPT_IDE (1<<0) /* 0 for flash, 1 for IDE */
#define PIN_OPT_IDE (1<<0) /* 0 for flash, 1 for IDE */
/* Registers within the NAND flash controller BAR -- memory mapped */
#define MM_NAND_DATA 0x00 /* 0 to 0x7ff, in fact */
......@@ -128,7 +128,7 @@ static void cs553x_write_byte(struct mtd_info *mtd, u_char byte)
udelay(1);
i--;
}
writeb(byte, this->IO_ADDR_W+0x801);
writeb(byte, this->IO_ADDR_W + 0x801);
}
static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd)
......@@ -137,7 +137,7 @@ static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd)
void __iomem *mmio_base = this->IO_ADDR_R;
unsigned char ctl;
switch(cmd) {
switch (cmd) {
case NAND_CTL_SETCLE:
ctl = CS_NAND_CTL_CLE;
break;
......@@ -160,17 +160,15 @@ static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd)
writeb(ctl, mmio_base + MM_NAND_CTL);
}
static int cs553x_device_ready(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
void __iomem *mmio_base = this->IO_ADDR_R;
unsigned char foo = readb(mmio_base + MM_NAND_STS);
return (foo & CS_NAND_STS_FLASH_RDY) && !(foo & CS_NAND_CTLR_BUSY);
return (foo & CS_NAND_STS_FLASH_RDY) && !(foo & CS_NAND_CTLR_BUSY);
}
static void cs_enable_hwecc(struct mtd_info *mtd, int mode)
{
struct nand_chip *this = mtd->priv;
......@@ -209,7 +207,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
}
/* Allocate memory for MTD device structure and private data */
new_mtd = kmalloc(sizeof(struct mtd_info) + sizeof (struct nand_chip), GFP_KERNEL);
new_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!new_mtd) {
printk(KERN_WARNING "Unable to allocate CS553X NAND MTD device structure.\n");
err = -ENOMEM;
......@@ -217,7 +215,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
}
/* Get pointer to private data */
this = (struct nand_chip *) (&new_mtd[1]);
this = (struct nand_chip *)(&new_mtd[1]);
/* Initialize structures */
memset(new_mtd, 0, sizeof(struct mtd_info));
......@@ -286,16 +284,16 @@ int __init cs553x_init(void)
return -ENXIO;
}
for (i=0; i<NR_CS553X_CONTROLLERS; i++) {
rdmsrl(MSR_DIVIL_LBAR_FLSH0+i, val);
for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
rdmsrl(MSR_DIVIL_LBAR_FLSH0 + i, val);
if ((val & (FLSH_LBAR_EN|FLSH_NOR_NAND)) == (FLSH_LBAR_EN|FLSH_NOR_NAND))
err = cs553x_init_one(i, !!(val & FLSH_MEM_IO), val & 0xFFFFFFFF);
}
/* Register all devices together here. This means we can easily hack it to
do mtdconcat etc. if we want to. */
for (i=0; i<NR_CS553X_CONTROLLERS; i++) {
for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
if (cs553x_mtd[i]) {
add_mtd_device(cs553x_mtd[i]);
......@@ -306,13 +304,14 @@ int __init cs553x_init(void)
return err;
}
module_init(cs553x_init);
static void __exit cs553x_cleanup (void)
static void __exit cs553x_cleanup(void)
{
int i;
for (i=0; i<NR_CS553X_CONTROLLERS; i++) {
for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
struct mtd_info *mtd = cs553x_mtd[i];
struct nand_chip *this;
void __iomem *mmio_base;
......@@ -324,7 +323,7 @@ static void __exit cs553x_cleanup (void)
mmio_base = this->IO_ADDR_R;
/* Release resources, unregister device */
nand_release (cs553x_mtd[i]);
nand_release(cs553x_mtd[i]);
cs553x_mtd[i] = NULL;
/* unmap physical adress */
......@@ -334,6 +333,7 @@ static void __exit cs553x_cleanup (void)
kfree(mtd);
}
}
module_exit(cs553x_cleanup);
MODULE_LICENSE("GPL");
......
drivers/mtd/nand/diskonchip.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/edb7312.c
View file @ e0c7d767
......@@ -25,7 +25,7 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/sizes.h>
#include <asm/hardware/clps7111.h>
......@@ -54,29 +54,29 @@ static struct mtd_info *ep7312_mtd = NULL;
*/
static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
static void __iomem * ep7312_pxdr = (void __iomem *) EP7312_PXDR;
static void __iomem * ep7312_pxddr = (void __iomem *) EP7312_PXDDR;
static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
#ifdef CONFIG_MTD_PARTITIONS
/*
* Define static partitions for flash device
*/
static struct mtd_partition partition_info[] = {
{ .name = "EP7312 Nand Flash",
.offset = 0,
.size = 8*1024*1024 }
{.name = "EP7312 Nand Flash",
.offset = 0,
.size = 8 * 1024 * 1024}
};
#define NUM_PARTITIONS 1
#endif
/*
* hardware specific access to control-lines
*/
static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd)
{
switch(cmd) {
switch (cmd) {
case NAND_CTL_SETCLE:
clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr);
......@@ -108,6 +108,7 @@ static int ep7312_device_ready(struct mtd_info *mtd)
{
return 1;
}
#ifdef CONFIG_MTD_PARTITIONS
const char *part_probes[] = { "cmdlinepart", NULL };
#endif
......@@ -115,18 +116,16 @@ const char *part_probes[] = { "cmdlinepart", NULL };
/*
* Main initialization routine
*/
static int __init ep7312_init (void)
static int __init ep7312_init(void)
{
struct nand_chip *this;
const char *part_type = 0;
int mtd_parts_nb = 0;
struct mtd_partition *mtd_parts = 0;
void __iomem * ep7312_fio_base;
void __iomem *ep7312_fio_base;
/* Allocate memory for MTD device structure and private data */
ep7312_mtd = kmalloc(sizeof(struct mtd_info) +
sizeof(struct nand_chip),
GFP_KERNEL);
ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!ep7312_mtd) {
printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
return -ENOMEM;
......@@ -134,18 +133,18 @@ static int __init ep7312_init (void)
/* map physical adress */
ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
if(!ep7312_fio_base) {
if (!ep7312_fio_base) {
printk("ioremap EDB7312 NAND flash failed\n");
kfree(ep7312_mtd);
return -EIO;
}
/* Get pointer to private data */
this = (struct nand_chip *) (&ep7312_mtd[1]);
this = (struct nand_chip *)(&ep7312_mtd[1]);
/* Initialize structures */
memset((char *) ep7312_mtd, 0, sizeof(struct mtd_info));
memset((char *) this, 0, sizeof(struct nand_chip));
memset(ep7312_mtd, 0, sizeof(struct mtd_info));
memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
ep7312_mtd->priv = this;
......@@ -165,16 +164,14 @@ static int __init ep7312_init (void)
this->chip_delay = 15;
/* Scan to find existence of the device */
if (nand_scan (ep7312_mtd, 1)) {
if (nand_scan(ep7312_mtd, 1)) {
iounmap((void *)ep7312_fio_base);
kfree (ep7312_mtd);
kfree(ep7312_mtd);
return -ENXIO;
}
#ifdef CONFIG_MTD_PARTITIONS
ep7312_mtd->name = "edb7312-nand";
mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes,
&mtd_parts, 0);
mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
if (mtd_parts_nb > 0)
part_type = "command line";
else
......@@ -193,24 +190,26 @@ static int __init ep7312_init (void)
/* Return happy */
return 0;
}
module_init(ep7312_init);
/*
* Clean up routine
*/
static void __exit ep7312_cleanup (void)
static void __exit ep7312_cleanup(void)
{
struct nand_chip *this = (struct nand_chip *) &ep7312_mtd[1];
struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
/* Release resources, unregister device */
nand_release (ap7312_mtd);
nand_release(ap7312_mtd);
/* Free internal data buffer */
kfree (this->data_buf);
kfree(this->data_buf);
/* Free the MTD device structure */
kfree (ep7312_mtd);
kfree(ep7312_mtd);
}
module_exit(ep7312_cleanup);
MODULE_LICENSE("GPL");
......
drivers/mtd/nand/h1910.c
View file @ e0c7d767
......@@ -26,7 +26,7 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
#include <asm/sizes.h>
#include <asm/arch/h1900-gpio.h>
#include <asm/arch/ipaq.h>
......@@ -45,23 +45,23 @@ static struct mtd_info *h1910_nand_mtd = NULL;
* Define static partitions for flash device
*/
static struct mtd_partition partition_info[] = {
{ name: "h1910 NAND Flash",
offset: 0,
size: 16*1024*1024 }
{name:"h1910 NAND Flash",
offset:0,
size:16 * 1024 * 1024}
};
#define NUM_PARTITIONS 1
#endif
/*
* hardware specific access to control-lines
*/
static void h1910_hwcontrol(struct mtd_info *mtd, int cmd)
{
struct nand_chip* this = (struct nand_chip *) (mtd->priv);
struct nand_chip *this = (struct nand_chip *)(mtd->priv);
switch(cmd) {
switch (cmd) {
case NAND_CTL_SETCLE:
this->IO_ADDR_R |= (1 << 2);
......@@ -101,7 +101,7 @@ static int h1910_device_ready(struct mtd_info *mtd)
/*
* Main initialization routine
*/
static int __init h1910_init (void)
static int __init h1910_init(void)
{
struct nand_chip *this;
const char *part_type = 0;
......@@ -119,21 +119,19 @@ static int __init h1910_init (void)
}
/* Allocate memory for MTD device structure and private data */
h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) +
sizeof(struct nand_chip),
GFP_KERNEL);
h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!h1910_nand_mtd) {
printk("Unable to allocate h1910 NAND MTD device structure.\n");
iounmap ((void *) nandaddr);
iounmap((void *)nandaddr);
return -ENOMEM;
}
/* Get pointer to private data */
this = (struct nand_chip *) (&h1910_nand_mtd[1]);
this = (struct nand_chip *)(&h1910_nand_mtd[1]);
/* Initialize structures */
memset((char *) h1910_nand_mtd, 0, sizeof(struct mtd_info));
memset((char *) this, 0, sizeof(struct nand_chip));
memset(h1910_nand_mtd, 0, sizeof(struct mtd_info));
memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
h1910_nand_mtd->priv = this;
......@@ -154,23 +152,20 @@ static int __init h1910_init (void)
this->options = NAND_NO_AUTOINCR;
/* Scan to find existence of the device */
if (nand_scan (h1910_nand_mtd, 1)) {
if (nand_scan(h1910_nand_mtd, 1)) {
printk(KERN_NOTICE "No NAND device - returning -ENXIO\n");
kfree (h1910_nand_mtd);
iounmap ((void *) nandaddr);
kfree(h1910_nand_mtd);
iounmap((void *)nandaddr);
return -ENXIO;
}
#ifdef CONFIG_MTD_CMDLINE_PARTS
mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts,
"h1910-nand");
mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts, "h1910-nand");
if (mtd_parts_nb > 0)
part_type = "command line";
part_type = "command line";
else
mtd_parts_nb = 0;
mtd_parts_nb = 0;
#endif
if (mtd_parts_nb == 0)
{
if (mtd_parts_nb == 0) {
mtd_parts = partition_info;
mtd_parts_nb = NUM_PARTITIONS;
part_type = "static";
......@@ -183,24 +178,26 @@ static int __init h1910_init (void)
/* Return happy */
return 0;
}
module_init(h1910_init);
/*
* Clean up routine
*/
static void __exit h1910_cleanup (void)
static void __exit h1910_cleanup(void)
{
struct nand_chip *this = (struct nand_chip *) &h1910_nand_mtd[1];
struct nand_chip *this = (struct nand_chip *)&h1910_nand_mtd[1];
/* Release resources, unregister device */
nand_release (h1910_nand_mtd);
nand_release(h1910_nand_mtd);
/* Release io resource */
iounmap ((void *) this->IO_ADDR_W);
iounmap((void *)this->IO_ADDR_W);
/* Free the MTD device structure */
kfree (h1910_nand_mtd);
kfree(h1910_nand_mtd);
}
module_exit(h1910_cleanup);
MODULE_LICENSE("GPL");
......
drivers/mtd/nand/nand_base.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/nand_bbt.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/nand_ecc.c
View file @ e0c7d767
......@@ -62,7 +62,6 @@ static const u_char nand_ecc_precalc_table[] = {
0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
};
/**
* nand_trans_result - [GENERIC] create non-inverted ECC
* @reg2: line parity reg 2
......@@ -71,8 +70,7 @@ static const u_char nand_ecc_precalc_table[] = {
*
* Creates non-inverted ECC code from line parity
*/
static void nand_trans_result(u_char reg2, u_char reg3,
u_char *ecc_code)
static void nand_trans_result(u_char reg2, u_char reg3, u_char *ecc_code)
{
u_char a, b, i, tmp1, tmp2;
......@@ -82,10 +80,10 @@ static void nand_trans_result(u_char reg2, u_char reg3,
/* Calculate first ECC byte */
for (i = 0; i < 4; i++) {
if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
tmp1 |= b;
b >>= 1;
if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
tmp1 |= b;
b >>= 1;
a >>= 1;
......@@ -94,10 +92,10 @@ static void nand_trans_result(u_char reg2, u_char reg3,
/* Calculate second ECC byte */
b = 0x80;
for (i = 0; i < 4; i++) {
if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
tmp2 |= b;
b >>= 1;
if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
tmp2 |= b;
b >>= 1;
a >>= 1;
......@@ -124,7 +122,7 @@ int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code
ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
/* Build up column parity */
for(j = 0; j < 256; j++) {
for (j = 0; j < 256; j++) {
/* Get CP0 - CP5 from table */
idx = nand_ecc_precalc_table[dat[j]];
......@@ -168,8 +166,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
if ((d1 | d2 | d3) == 0) {
/* No errors */
return 0;
}
else {
} else {
a = (d1 ^ (d1 >> 1)) & 0x55;
b = (d2 ^ (d2 >> 1)) & 0x55;
c = (d3 ^ (d3 >> 1)) & 0x54;
......@@ -179,14 +176,14 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
c = 0x80;
add = 0;
a = 0x80;
for (i=0; i<4; i++) {
for (i = 0; i < 4; i++) {
if (d1 & c)
add |= a;
c >>= 2;
a >>= 1;
}
c = 0x80;
for (i=0; i<4; i++) {
for (i = 0; i < 4; i++) {
if (d2 & c)
add |= a;
c >>= 2;
......@@ -195,7 +192,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
bit = 0;
b = 0x04;
c = 0x80;
for (i=0; i<3; i++) {
for (i = 0; i < 3; i++) {
if (d3 & c)
bit |= b;
c >>= 2;
......@@ -206,8 +203,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
a ^= (b << bit);
dat[add] = a;
return 1;
}
else {
} else {
i = 0;
while (d1) {
if (d1 & 0x01)
......@@ -230,8 +226,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
read_ecc[1] = calc_ecc[1];
read_ecc[2] = calc_ecc[2];
return 2;
}
else {
} else {
/* Uncorrectable Error */
return -1;
}
......
drivers/mtd/nand/nand_ids.c
View file @ e0c7d767
......@@ -125,13 +125,13 @@ struct nand_manufacturers nand_manuf_ids[] = {
{NAND_MFR_NATIONAL, "National"},
{NAND_MFR_RENESAS, "Renesas"},
{NAND_MFR_STMICRO, "ST Micro"},
{NAND_MFR_HYNIX, "Hynix"},
{NAND_MFR_HYNIX, "Hynix"},
{0x0, "Unknown"}
};
EXPORT_SYMBOL (nand_manuf_ids);
EXPORT_SYMBOL (nand_flash_ids);
EXPORT_SYMBOL(nand_manuf_ids);
EXPORT_SYMBOL(nand_flash_ids);
MODULE_LICENSE ("GPL");
MODULE_AUTHOR ("Thomas Gleixner <tglx@linutronix.de>");
MODULE_DESCRIPTION ("Nand device & manufacturer ID's");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
MODULE_DESCRIPTION("Nand device & manufacturer IDs");
drivers/mtd/nand/ppchameleonevb.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/rtc_from4.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/s3c2410.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/sharpsl.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/spia.c
View file @ e0c7d767
......@@ -39,16 +39,16 @@ static struct mtd_info *spia_mtd = NULL;
*/
#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
#define SPIA_PEDR 0x0080 /*
* IO offset to Port E data register
* where the CLE, ALE and NCE pins
* are wired to.
*/
#define SPIA_PEDDR 0x00c0 /*
* IO offset to Port E data direction
* register so we can control the IO
* lines.
*/
#define SPIA_PEDR 0x0080 /*
* IO offset to Port E data register
* where the CLE, ALE and NCE pins
* are wired to.
*/
#define SPIA_PEDDR 0x00c0 /*
* IO offset to Port E data direction
* register so we can control the IO
* lines.
*/
/*
* Module stuff
......@@ -69,25 +69,23 @@ module_param(spia_peddr, int, 0);
*/
static const struct mtd_partition partition_info[] = {
{
.name = "SPIA flash partition 1",
.offset = 0,
.size = 2*1024*1024
},
.name = "SPIA flash partition 1",
.offset = 0,
.size = 2 * 1024 * 1024},
{
.name = "SPIA flash partition 2",
.offset = 2*1024*1024,
.size = 6*1024*1024
}
.name = "SPIA flash partition 2",
.offset = 2 * 1024 * 1024,
.size = 6 * 1024 * 1024}
};
#define NUM_PARTITIONS 2
#define NUM_PARTITIONS 2
/*
* hardware specific access to control-lines
*/
static void spia_hwcontrol(struct mtd_info *mtd, int cmd){
switch(cmd){
static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
{
switch (cmd) {
case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break;
case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break;
......@@ -97,30 +95,29 @@ static void spia_hwcontrol(struct mtd_info *mtd, int cmd){
case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break;
case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break;
}
}
}
/*
* Main initialization routine
*/
int __init spia_init (void)
int __init spia_init(void)
{
struct nand_chip *this;
/* Allocate memory for MTD device structure and private data */
spia_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
GFP_KERNEL);
spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!spia_mtd) {
printk ("Unable to allocate SPIA NAND MTD device structure.\n");
printk("Unable to allocate SPIA NAND MTD device structure.\n");
return -ENOMEM;
}
/* Get pointer to private data */
this = (struct nand_chip *) (&spia_mtd[1]);
this = (struct nand_chip *)(&spia_mtd[1]);
/* Initialize structures */
memset((char *) spia_mtd, 0, sizeof(struct mtd_info));
memset((char *) this, 0, sizeof(struct nand_chip));
memset(spia_mtd, 0, sizeof(struct mtd_info));
memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
spia_mtd->priv = this;
......@@ -129,19 +126,19 @@ int __init spia_init (void)
* Set GPIO Port E control register so that the pins are configured
* to be outputs for controlling the NAND flash.
*/
(*(volatile unsigned char *) (spia_io_base + spia_peddr)) = 0x07;
(*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
/* Set address of NAND IO lines */
this->IO_ADDR_R = (void __iomem *) spia_fio_base;
this->IO_ADDR_W = (void __iomem *) spia_fio_base;
this->IO_ADDR_R = (void __iomem *)spia_fio_base;
this->IO_ADDR_W = (void __iomem *)spia_fio_base;
/* Set address of hardware control function */
this->hwcontrol = spia_hwcontrol;
/* 15 us command delay time */
this->chip_delay = 15;
/* Scan to find existence of the device */
if (nand_scan (spia_mtd, 1)) {
kfree (spia_mtd);
if (nand_scan(spia_mtd, 1)) {
kfree(spia_mtd);
return -ENXIO;
}
......@@ -151,20 +148,22 @@ int __init spia_init (void)
/* Return happy */
return 0;
}
module_init(spia_init);
/*
* Clean up routine
*/
#ifdef MODULE
static void __exit spia_cleanup (void)
static void __exit spia_cleanup(void)
{
/* Release resources, unregister device */
nand_release (spia_mtd);
nand_release(spia_mtd);
/* Free the MTD device structure */
kfree (spia_mtd);
kfree(spia_mtd);
}
module_exit(spia_cleanup);
#endif
......
drivers/mtd/nand/toto.c
View file @ e0c7d767
This diff is collapsed.
drivers/mtd/nand/ts7250.c
View file @ e0c7d767
This diff is collapsed.
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