Commit e167bfca authored by Hidetoshi Seto's avatar Hidetoshi Seto Committed by Jesse Barnes

PCI: aerdrv: remove magical ROOT_ERR_STATUS_MASKS

Make it clear that we only interest in 2 *_RCV bits.
Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent f647a44f
...@@ -204,7 +204,7 @@ irqreturn_t aer_irq(int irq, void *context) ...@@ -204,7 +204,7 @@ irqreturn_t aer_irq(int irq, void *context)
/* Read error status */ /* Read error status */
pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, &status); pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, &status);
if (!(status & ROOT_ERR_STATUS_MASKS)) { if (!(status & (PCI_ERR_ROOT_UNCOR_RCV|PCI_ERR_ROOT_COR_RCV))) {
spin_unlock_irqrestore(&rpc->e_lock, flags); spin_unlock_irqrestore(&rpc->e_lock, flags);
return IRQ_NONE; return IRQ_NONE;
} }
......
...@@ -17,9 +17,6 @@ ...@@ -17,9 +17,6 @@
#define AER_FATAL 1 #define AER_FATAL 1
#define AER_CORRECTABLE 2 #define AER_CORRECTABLE 2
/* Root Error Status Register Bits */
#define ROOT_ERR_STATUS_MASKS 0x0f
#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \ #define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \
PCI_EXP_RTCTL_SENFEE| \ PCI_EXP_RTCTL_SENFEE| \
PCI_EXP_RTCTL_SEFEE) PCI_EXP_RTCTL_SEFEE)
......
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