Commit e178f705 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter

drm/i915: Provide PDP updates via MMIO

The initial implementation of this function used MMIO to write the PDPs.
Upon review it was determined (correctly) that the docs say to use LRI.
The issue is there are times where we want to do a synchronous write
(GPU reset).

I've tested this, and it works. I've verified with as many people as
possible that it should work.

This should fix the failing reset problems.
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent f7698ba7
...@@ -197,12 +197,19 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr, ...@@ -197,12 +197,19 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
/* Broadwell Page Directory Pointer Descriptors */ /* Broadwell Page Directory Pointer Descriptors */
static int gen8_write_pdp(struct intel_ring_buffer *ring, unsigned entry, static int gen8_write_pdp(struct intel_ring_buffer *ring, unsigned entry,
uint64_t val) uint64_t val, bool synchronous)
{ {
struct drm_i915_private *dev_priv = ring->dev->dev_private;
int ret; int ret;
BUG_ON(entry >= 4); BUG_ON(entry >= 4);
if (synchronous) {
I915_WRITE(GEN8_RING_PDP_UDW(ring, entry), val >> 32);
I915_WRITE(GEN8_RING_PDP_LDW(ring, entry), (u32)val);
return 0;
}
ret = intel_ring_begin(ring, 6); ret = intel_ring_begin(ring, 6);
if (ret) if (ret)
return ret; return ret;
...@@ -236,7 +243,8 @@ static int gen8_ppgtt_enable(struct drm_device *dev) ...@@ -236,7 +243,8 @@ static int gen8_ppgtt_enable(struct drm_device *dev)
for (i = used_pd - 1; i >= 0; i--) { for (i = used_pd - 1; i >= 0; i--) {
dma_addr_t addr = ppgtt->pd_dma_addr[i]; dma_addr_t addr = ppgtt->pd_dma_addr[i];
for_each_ring(ring, dev_priv, j) { for_each_ring(ring, dev_priv, j) {
ret = gen8_write_pdp(ring, i, addr); ret = gen8_write_pdp(ring, i, addr,
i915_reset_in_progress(&dev_priv->gpu_error));
if (ret) if (ret)
goto err_out; goto err_out;
} }
......
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