Commit e2a77c7c authored by Olof Johansson's avatar Olof Johansson

Merge tag 'atlas7-init-dts-for-3.20' of...

Merge tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt

Merge "CSR atlas7 init dts for 3.20" from Barry Song:

Drop Marco and add init dts stuff for Atlas7

CSR Marco SoC has never shipped to customers that could be interested
in mainline support. and new Atlas7 is a replacement SoC that is in
development.

So we drop Marco dts stuff, and add dts stuff for Atlas7.

* tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: dts: add init dts file for CSR atlas7 SoC
  ARM: dts: drop MARCO platform DT stuff
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 86d377db 7d76d03b
......@@ -3,7 +3,9 @@ CSR SiRFprimaII and SiRFmarco device tree bindings.
Required root node properties:
- compatible:
- "sirf,atlas6-cb" : atlas6 "cb" evaluation board
- "sirf,atlas6" : atlas6 device based board
- "sirf,atlas7-cb" : atlas7 "cb" evaluation board
- "sirf,atlas7" : atlas7 device based board
- "sirf,prima2-cb" : prima2 "cb" evaluation board
- "sirf,marco-cb" : marco "cb" evaluation board
- "sirf,prima2" : prima2 device based board
- "sirf,marco" : marco device based board
......@@ -53,6 +53,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += \
atlas6-evb.dtb
dtb-$(CONFIG_ARCH_ATLAS7) += \
atlas7-evb.dtb
dtb-$(CONFIG_ARCH_AXXIA) += \
axm5516-amarillo.dtb
dtb-$(CONFIG_ARCH_BCM2835) += \
......@@ -195,8 +197,6 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-ts419-6282.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += \
ea3250.dtb phy3250.dtb
dtb-$(CONFIG_ARCH_MARCO) += \
marco-evb.dtb
dtb-$(CONFIG_MACH_MESON6) += \
meson6-atv1200.dtb
dtb-$(CONFIG_ARCH_MMP) += \
......
/*
* DTS file for CSR SiRFatlas7 Evaluation Board
*
* Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "atlas7.dtsi"
/ {
model = "CSR SiRFatlas7 Evaluation Board";
compatible = "sirf,atlas7-cb", "sirf,atlas7";
chosen {
bootargs = "console=ttySiRF1,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vpp_reserved: vpp_mem@5e800000 {
compatible = "sirf,reserved-memory";
reg = <0x5e800000 0x800000>;
};
nanddisk_reserved: nanddisk@46000000 {
reg = <0x46000000 0x200000>;
no-map;
};
};
noc {
mediam {
nand@17050000 {
memory-region = <&nanddisk_reserved>;
};
};
gnssm {
spi1: spi@18200000 {
status = "okay";
spiflash: macronix@0{
status = "okay";
compatible = "macronix,mx25l6405d";
reg = <0>;
spi-max-frequency = <37500000>;
spi-cpha;
spi-cpol;
#address-cells = <1>;
#size-cells = <1>;
partitions@0 {
label = "myspiboot";
reg = <0x0 0x800000>;
};
};
};
};
btm {
uart6: uart@11000000 {
status = "okay";
sirf,uart-has-rtscts;
};
};
disp-iobg {
vpp@13110000 {
memory-region = <&vpp_reserved>;
};
};
display0: display@0 {
compatible = "lvds-panel";
source = "lvds.0";
bl-gpios = <&gpio_1 63 0>;
data-lines = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <60000000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <220>;
hback-porch = <100>;
hsync-len = <1>;
vback-porch = <10>;
vfront-porch = <25>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
};
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/*
* DTS file for CSR SiRFmarco Evaluation Board
*
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "marco.dtsi"
/ {
model = "CSR SiRFmarco Evaluation Board";
compatible = "sirf,marco-cb", "sirf,marco";
memory {
reg = <0x40000000 0x60000000>;
};
axi {
peri-iobg {
uart1: uart@cc060000 {
status = "okay";
};
uart2: uart@cc070000 {
status = "okay";
};
i2c0: i2c@cc0e0000 {
status = "okay";
fpga-cpld@4d {
compatible = "sirf,fpga-cpld";
reg = <0x4d>;
};
};
spi1: spi@cc170000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins_a>;
spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
pci-iobg {
sd0: sdhci@cd000000 {
bus-width = <8>;
status = "okay";
};
};
};
};
};
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