Commit e49aedb5 authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide-next-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide-next-2.6:
  sl82c105: remove no longer needed debugging code
  sis5513: remove stale TODO
  pdc202xx_old: remove no longer needed debugging code
  cy82c693: remove no longer needed debugging code
  cmd64x: remove no longer needed debugging code
  alim15x3: remove obsolete and dangerous wdc_udma parameter
  ide: Increase WAIT_DRQ to accomodate some CF cards and SSD drives.
  cs5535: add pci id for AMD based CS5535 controllers
  slc90e66: fix UDMA handling
  drivers/ide/tx4938ide.c: use resource_size()
  drivers/ide/ide_platform.c: use resource_size()
  drivers/ide/au1xxx-ide.c: use resource_size()
  hpt366: remove dead old timing tables
  ide: update Kconfig text to mark as deprecated
  ide-tape: remove the BKL
  hpt366: kill unused #define's
parents 4ef58d4e 4e5b932c
...@@ -7,50 +7,25 @@ config HAVE_IDE ...@@ -7,50 +7,25 @@ config HAVE_IDE
bool bool
menuconfig IDE menuconfig IDE
tristate "ATA/ATAPI/MFM/RLL support" tristate "ATA/ATAPI/MFM/RLL support (DEPRECATED)"
depends on HAVE_IDE depends on HAVE_IDE
depends on BLOCK depends on BLOCK
---help--- ---help---
If you say Y here, your kernel will be able to manage low cost mass If you say Y here, your kernel will be able to manage ATA/(E)IDE and
storage units such as ATA/(E)IDE and ATAPI units. The most common ATAPI units. The most common cases are IDE hard drives and ATAPI
cases are IDE hard drives and ATAPI CD-ROM drives. CD-ROM drives.
If your system is pure SCSI and doesn't use these interfaces, you This subsystem is currently in maintenance mode with only bug fix
can say N here. changes applied. Users of ATA hardware are encouraged to migrate to
the newer ATA subsystem ("Serial ATA (prod) and Parallel ATA
Integrated Disk Electronics (IDE aka ATA-1) is a connecting standard (experimental) drivers") which is more actively maintained.
for mass storage units such as hard disks. It was designed by
Western Digital and Compaq Computer in 1984. It was then named
ST506. Quite a number of disks use the IDE interface.
AT Attachment (ATA) is the superset of the IDE specifications.
ST506 was also called ATA-1.
Fast-IDE is ATA-2 (also named Fast ATA), Enhanced IDE (EIDE) is
ATA-3. It provides support for larger disks (up to 8.4GB by means of
the LBA standard), more disks (4 instead of 2) and for other mass
storage units such as tapes and cdrom. UDMA/33 (aka UltraDMA/33) is
ATA-4 and provides faster (and more CPU friendly) transfer modes
than previous PIO (Programmed processor Input/Output) from previous
ATA/IDE standards by means of fast DMA controllers.
ATA Packet Interface (ATAPI) is a protocol used by EIDE tape and
CD-ROM drives, similar in many respects to the SCSI protocol.
SMART IDE (Self Monitoring, Analysis and Reporting Technology) was
designed in order to prevent data corruption and disk crash by
detecting pre hardware failure conditions (heat, access time, and
the like...). Disks built since June 1995 may follow this standard.
The kernel itself doesn't manage this; however there are quite a
number of user programs such as smart that can query the status of
SMART parameters from disk drives.
To compile this driver as a module, choose M here: the To compile this driver as a module, choose M here: the
module will be called ide-core. module will be called ide-core.
For further information, please read <file:Documentation/ide/ide.txt>. For further information, please read <file:Documentation/ide/ide.txt>.
If unsure, say Y. If unsure, say N.
if IDE if IDE
......
...@@ -39,16 +39,6 @@ ...@@ -39,16 +39,6 @@
#define DRV_NAME "alim15x3" #define DRV_NAME "alim15x3"
/*
* Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
* (this is DANGEROUS and could result in data corruption).
*/
static int wdc_udma;
module_param(wdc_udma, bool, 0);
MODULE_PARM_DESC(wdc_udma,
"allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");
/* /*
* ALi devices are not plug in. Otherwise these static values would * ALi devices are not plug in. Otherwise these static values would
* need to go. They ought to go away anyway * need to go. They ought to go away anyway
...@@ -132,7 +122,7 @@ static u8 ali_udma_filter(ide_drive_t *drive) ...@@ -132,7 +122,7 @@ static u8 ali_udma_filter(ide_drive_t *drive)
if (m5229_revision > 0x20 && m5229_revision < 0xC2) { if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
if (drive->media != ide_disk) if (drive->media != ide_disk)
return 0; return 0;
if (wdc_udma == 0 && chip_is_1543c_e && if (chip_is_1543c_e &&
strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
return 0; return 0;
} }
......
...@@ -532,14 +532,13 @@ static int au_ide_probe(struct platform_device *dev) ...@@ -532,14 +532,13 @@ static int au_ide_probe(struct platform_device *dev)
goto out; goto out;
} }
if (!request_mem_region(res->start, res->end - res->start + 1, if (!request_mem_region(res->start, resource_size(res), dev->name)) {
dev->name)) {
pr_debug("%s: request_mem_region failed\n", DRV_NAME); pr_debug("%s: request_mem_region failed\n", DRV_NAME);
ret = -EBUSY; ret = -EBUSY;
goto out; goto out;
} }
ahwif->regbase = (u32)ioremap(res->start, res->end - res->start + 1); ahwif->regbase = (u32)ioremap(res->start, resource_size(res));
if (ahwif->regbase == 0) { if (ahwif->regbase == 0) {
ret = -ENOMEM; ret = -ENOMEM;
goto out; goto out;
...@@ -575,7 +574,7 @@ static int au_ide_remove(struct platform_device *dev) ...@@ -575,7 +574,7 @@ static int au_ide_remove(struct platform_device *dev)
iounmap((void *)ahwif->regbase); iounmap((void *)ahwif->regbase);
res = platform_get_resource(dev, IORESOURCE_MEM, 0); res = platform_get_resource(dev, IORESOURCE_MEM, 0);
release_mem_region(res->start, res->end - res->start + 1); release_mem_region(res->start, resource_size(res));
return 0; return 0;
} }
......
...@@ -20,14 +20,6 @@ ...@@ -20,14 +20,6 @@
#define DRV_NAME "cmd64x" #define DRV_NAME "cmd64x"
#define CMD_DEBUG 0
#if CMD_DEBUG
#define cmdprintk(x...) printk(x)
#else
#define cmdprintk(x...)
#endif
/* /*
* CMD64x specific registers definition. * CMD64x specific registers definition.
*/ */
...@@ -76,9 +68,6 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_ ...@@ -76,9 +68,6 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
{15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0}; {15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
static const u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM2, DRWTIM3}; static const u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM2, DRWTIM3};
cmdprintk("program_cycle_times parameters: total=%d, active=%d\n",
cycle_time, active_time);
cycle_count = quantize_timing( cycle_time, clock_time); cycle_count = quantize_timing( cycle_time, clock_time);
active_count = quantize_timing(active_time, clock_time); active_count = quantize_timing(active_time, clock_time);
recovery_count = cycle_count - active_count; recovery_count = cycle_count - active_count;
...@@ -94,9 +83,6 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_ ...@@ -94,9 +83,6 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
if (active_count > 16) /* shouldn't actually happen... */ if (active_count > 16) /* shouldn't actually happen... */
active_count = 16; active_count = 16;
cmdprintk("Final counts: total=%d, active=%d, recovery=%d\n",
cycle_count, active_count, recovery_count);
/* /*
* Convert values to internal chipset representation * Convert values to internal chipset representation
*/ */
...@@ -106,7 +92,6 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_ ...@@ -106,7 +92,6 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
/* Program the active/recovery counts into the DRWTIM register */ /* Program the active/recovery counts into the DRWTIM register */
drwtim = (active_count << 4) | recovery_count; drwtim = (active_count << 4) | recovery_count;
(void) pci_write_config_byte(dev, drwtim_regs[drive->dn], drwtim); (void) pci_write_config_byte(dev, drwtim_regs[drive->dn], drwtim);
cmdprintk("Write 0x%02x to reg 0x%x\n", drwtim, drwtim_regs[drive->dn]);
} }
/* /*
...@@ -150,7 +135,6 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio) ...@@ -150,7 +135,6 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
if (setup_count > 5) /* shouldn't actually happen... */ if (setup_count > 5) /* shouldn't actually happen... */
setup_count = 5; setup_count = 5;
cmdprintk("Final address setup count: %d\n", setup_count);
/* /*
* Program the address setup clocks into the ARTTIM registers. * Program the address setup clocks into the ARTTIM registers.
...@@ -162,7 +146,6 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio) ...@@ -162,7 +146,6 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
arttim &= ~0xc0; arttim &= ~0xc0;
arttim |= setup_values[setup_count]; arttim |= setup_values[setup_count];
(void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim); (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim);
cmdprintk("Write 0x%02x to reg 0x%x\n", arttim, arttim_regs[drive->dn]);
} }
/* /*
......
...@@ -187,6 +187,7 @@ static int __devinit cs5535_init_one(struct pci_dev *dev, ...@@ -187,6 +187,7 @@ static int __devinit cs5535_init_one(struct pci_dev *dev,
static const struct pci_device_id cs5535_pci_tbl[] = { static const struct pci_device_id cs5535_pci_tbl[] = {
{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), 0 }, { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), 0 },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), },
{ 0, }, { 0, },
}; };
......
...@@ -50,11 +50,6 @@ ...@@ -50,11 +50,6 @@
#define DRV_NAME "cy82c693" #define DRV_NAME "cy82c693"
/*
* The following are used to debug the driver.
*/
#define CY82C693_DEBUG_INFO 0
/* /*
* NOTE: the value for busmaster timeout is tricky and I got it by * NOTE: the value for busmaster timeout is tricky and I got it by
* trial and error! By using a to low value will cause DMA timeouts * trial and error! By using a to low value will cause DMA timeouts
...@@ -176,11 +171,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) ...@@ -176,11 +171,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
outb(index, CY82_INDEX_PORT); outb(index, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT); outb(data, CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s (ch=%d, dev=%d): set DMA mode to %d (single=%d)\n",
drive->name, hwif->channel, drive->dn & 1, mode & 3, single);
#endif /* CY82C693_DEBUG_INFO */
/* /*
* note: below we set the value for Bus Master IDE TimeOut Register * note: below we set the value for Bus Master IDE TimeOut Register
* I'm not absolutly sure what this does, but it solved my problem * I'm not absolutly sure what this does, but it solved my problem
...@@ -194,11 +184,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) ...@@ -194,11 +184,6 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
data = BUSMASTER_TIMEOUT; data = BUSMASTER_TIMEOUT;
outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT); outb(data, CY82_DATA_PORT);
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
drive->name, data);
#endif /* CY82C693_DEBUG_INFO */
} }
static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
...@@ -239,8 +224,6 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) ...@@ -239,8 +224,6 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r); pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r);
pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w); pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w);
pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8); pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8);
addrCtrl &= 0xF;
} else { } else {
/* /*
* set slave drive * set slave drive
...@@ -257,17 +240,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) ...@@ -257,17 +240,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, pclk.time_16r); pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, pclk.time_16r);
pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, pclk.time_16w); pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, pclk.time_16w);
pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, pclk.time_8); pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, pclk.time_8);
addrCtrl >>= 4;
addrCtrl &= 0xF;
} }
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to "
"(addr=0x%X, ior=0x%X, iow=0x%X, 8bit=0x%X)\n",
drive->name, hwif->channel, drive->dn & 1,
addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
#endif /* CY82C693_DEBUG_INFO */
} }
static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
......
...@@ -297,68 +297,6 @@ static u32 twenty_five_base_hpt36x[] = { ...@@ -297,68 +297,6 @@ static u32 twenty_five_base_hpt36x[] = {
/* XFER_PIO_0 */ 0xc0d08585 /* XFER_PIO_0 */ 0xc0d08585
}; };
#if 0
/* These are the timing tables from the HighPoint open source drivers... */
static u32 thirty_three_base_hpt37x[] = {
/* XFER_UDMA_6 */ 0x12446231, /* 0x12646231 ?? */
/* XFER_UDMA_5 */ 0x12446231,
/* XFER_UDMA_4 */ 0x12446231,
/* XFER_UDMA_3 */ 0x126c6231,
/* XFER_UDMA_2 */ 0x12486231,
/* XFER_UDMA_1 */ 0x124c6233,
/* XFER_UDMA_0 */ 0x12506297,
/* XFER_MW_DMA_2 */ 0x22406c31,
/* XFER_MW_DMA_1 */ 0x22406c33,
/* XFER_MW_DMA_0 */ 0x22406c97,
/* XFER_PIO_4 */ 0x06414e31,
/* XFER_PIO_3 */ 0x06414e42,
/* XFER_PIO_2 */ 0x06414e53,
/* XFER_PIO_1 */ 0x06814e93,
/* XFER_PIO_0 */ 0x06814ea7
};
static u32 fifty_base_hpt37x[] = {
/* XFER_UDMA_6 */ 0x12848242,
/* XFER_UDMA_5 */ 0x12848242,
/* XFER_UDMA_4 */ 0x12ac8242,
/* XFER_UDMA_3 */ 0x128c8242,
/* XFER_UDMA_2 */ 0x120c8242,
/* XFER_UDMA_1 */ 0x12148254,
/* XFER_UDMA_0 */ 0x121882ea,
/* XFER_MW_DMA_2 */ 0x22808242,
/* XFER_MW_DMA_1 */ 0x22808254,
/* XFER_MW_DMA_0 */ 0x228082ea,
/* XFER_PIO_4 */ 0x0a81f442,
/* XFER_PIO_3 */ 0x0a81f443,
/* XFER_PIO_2 */ 0x0a81f454,
/* XFER_PIO_1 */ 0x0ac1f465,
/* XFER_PIO_0 */ 0x0ac1f48a
};
static u32 sixty_six_base_hpt37x[] = {
/* XFER_UDMA_6 */ 0x1c869c62,
/* XFER_UDMA_5 */ 0x1cae9c62, /* 0x1c8a9c62 */
/* XFER_UDMA_4 */ 0x1c8a9c62,
/* XFER_UDMA_3 */ 0x1c8e9c62,
/* XFER_UDMA_2 */ 0x1c929c62,
/* XFER_UDMA_1 */ 0x1c9a9c62,
/* XFER_UDMA_0 */ 0x1c829c62,
/* XFER_MW_DMA_2 */ 0x2c829c62,
/* XFER_MW_DMA_1 */ 0x2c829c66,
/* XFER_MW_DMA_0 */ 0x2c829d2e,
/* XFER_PIO_4 */ 0x0c829c62,
/* XFER_PIO_3 */ 0x0c829c84,
/* XFER_PIO_2 */ 0x0c829ca6,
/* XFER_PIO_1 */ 0x0d029d26,
/* XFER_PIO_0 */ 0x0d029d5e
};
#else
/* /*
* The following are the new timing tables with PIO mode data/taskfile transfer * The following are the new timing tables with PIO mode data/taskfile transfer
* overclocking fixed... * overclocking fixed...
...@@ -424,16 +362,13 @@ static u32 sixty_six_base_hpt37x[] = { ...@@ -424,16 +362,13 @@ static u32 sixty_six_base_hpt37x[] = {
/* XFER_PIO_1 */ 0x0d02ff26, /* XFER_PIO_1 */ 0x0d02ff26,
/* XFER_PIO_0 */ 0x0d42ff7f /* XFER_PIO_0 */ 0x0d42ff7f
}; };
#endif
#define HPT366_DEBUG_DRIVE_INFO 0
#define HPT371_ALLOW_ATA133_6 1 #define HPT371_ALLOW_ATA133_6 1
#define HPT302_ALLOW_ATA133_6 1 #define HPT302_ALLOW_ATA133_6 1
#define HPT372_ALLOW_ATA133_6 1 #define HPT372_ALLOW_ATA133_6 1
#define HPT370_ALLOW_ATA100_5 0 #define HPT370_ALLOW_ATA100_5 0
#define HPT366_ALLOW_ATA66_4 1 #define HPT366_ALLOW_ATA66_4 1
#define HPT366_ALLOW_ATA66_3 1 #define HPT366_ALLOW_ATA66_3 1
#define HPT366_MAX_DEVS 8
/* Supported ATA clock frequencies */ /* Supported ATA clock frequencies */
enum ata_clock { enum ata_clock {
......
...@@ -221,6 +221,8 @@ typedef struct ide_tape_obj { ...@@ -221,6 +221,8 @@ typedef struct ide_tape_obj {
static DEFINE_MUTEX(idetape_ref_mutex); static DEFINE_MUTEX(idetape_ref_mutex);
static DEFINE_MUTEX(idetape_chrdev_mutex);
static struct class *idetape_sysfs_class; static struct class *idetape_sysfs_class;
static void ide_tape_release(struct device *); static void ide_tape_release(struct device *);
...@@ -1457,10 +1459,11 @@ static int idetape_chrdev_open(struct inode *inode, struct file *filp) ...@@ -1457,10 +1459,11 @@ static int idetape_chrdev_open(struct inode *inode, struct file *filp)
if (i >= MAX_HWIFS * MAX_DRIVES) if (i >= MAX_HWIFS * MAX_DRIVES)
return -ENXIO; return -ENXIO;
lock_kernel(); mutex_lock(&idetape_chrdev_mutex);
tape = ide_tape_get(NULL, true, i); tape = ide_tape_get(NULL, true, i);
if (!tape) { if (!tape) {
unlock_kernel(); mutex_unlock(&idetape_chrdev_mutex);
return -ENXIO; return -ENXIO;
} }
...@@ -1519,12 +1522,15 @@ static int idetape_chrdev_open(struct inode *inode, struct file *filp) ...@@ -1519,12 +1522,15 @@ static int idetape_chrdev_open(struct inode *inode, struct file *filp)
tape->door_locked = DOOR_LOCKED; tape->door_locked = DOOR_LOCKED;
} }
} }
unlock_kernel(); mutex_unlock(&idetape_chrdev_mutex);
return 0; return 0;
out_put_tape: out_put_tape:
ide_tape_put(tape); ide_tape_put(tape);
unlock_kernel();
mutex_unlock(&idetape_chrdev_mutex);
return retval; return retval;
} }
...@@ -1551,7 +1557,8 @@ static int idetape_chrdev_release(struct inode *inode, struct file *filp) ...@@ -1551,7 +1557,8 @@ static int idetape_chrdev_release(struct inode *inode, struct file *filp)
ide_drive_t *drive = tape->drive; ide_drive_t *drive = tape->drive;
unsigned int minor = iminor(inode); unsigned int minor = iminor(inode);
lock_kernel(); mutex_lock(&idetape_chrdev_mutex);
tape = drive->driver_data; tape = drive->driver_data;
ide_debug_log(IDE_DBG_FUNC, "enter"); ide_debug_log(IDE_DBG_FUNC, "enter");
...@@ -1575,7 +1582,9 @@ static int idetape_chrdev_release(struct inode *inode, struct file *filp) ...@@ -1575,7 +1582,9 @@ static int idetape_chrdev_release(struct inode *inode, struct file *filp)
} }
clear_bit(ilog2(IDE_AFLAG_BUSY), &drive->atapi_flags); clear_bit(ilog2(IDE_AFLAG_BUSY), &drive->atapi_flags);
ide_tape_put(tape); ide_tape_put(tape);
unlock_kernel();
mutex_unlock(&idetape_chrdev_mutex);
return 0; return 0;
} }
......
...@@ -81,14 +81,14 @@ static int __devinit plat_ide_probe(struct platform_device *pdev) ...@@ -81,14 +81,14 @@ static int __devinit plat_ide_probe(struct platform_device *pdev)
if (mmio) { if (mmio) {
base = devm_ioremap(&pdev->dev, base = devm_ioremap(&pdev->dev,
res_base->start, res_base->end - res_base->start + 1); res_base->start, resource_size(res_base));
alt_base = devm_ioremap(&pdev->dev, alt_base = devm_ioremap(&pdev->dev,
res_alt->start, res_alt->end - res_alt->start + 1); res_alt->start, resource_size(res_alt));
} else { } else {
base = devm_ioport_map(&pdev->dev, base = devm_ioport_map(&pdev->dev,
res_base->start, res_base->end - res_base->start + 1); res_base->start, resource_size(res_base));
alt_base = devm_ioport_map(&pdev->dev, alt_base = devm_ioport_map(&pdev->dev,
res_alt->start, res_alt->end - res_alt->start + 1); res_alt->start, resource_size(res_alt));
} }
memset(&hw, 0, sizeof(hw)); memset(&hw, 0, sizeof(hw));
......
...@@ -21,8 +21,6 @@ ...@@ -21,8 +21,6 @@
#define DRV_NAME "pdc202xx_old" #define DRV_NAME "pdc202xx_old"
#define PDC202XX_DEBUG_DRIVE_INFO 0
static void pdc_old_disable_66MHz_clock(ide_hwif_t *); static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
...@@ -34,11 +32,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) ...@@ -34,11 +32,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
u8 AP = 0, BP = 0, CP = 0; u8 AP = 0, BP = 0, CP = 0;
u8 TA = 0, TB = 0, TC = 0; u8 TA = 0, TB = 0, TC = 0;
#if PDC202XX_DEBUG_DRIVE_INFO
u32 drive_conf = 0;
pci_read_config_dword(dev, drive_pci, &drive_conf);
#endif
/* /*
* TODO: do this once per channel * TODO: do this once per channel
*/ */
...@@ -89,14 +82,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) ...@@ -89,14 +82,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
pci_write_config_byte(dev, drive_pci + 1, BP | TB); pci_write_config_byte(dev, drive_pci + 1, BP | TB);
pci_write_config_byte(dev, drive_pci + 2, CP | TC); pci_write_config_byte(dev, drive_pci + 2, CP | TC);
} }
#if PDC202XX_DEBUG_DRIVE_INFO
printk(KERN_DEBUG "%s: %s drive%d 0x%08x ",
drive->name, ide_xfer_verbose(speed),
drive->dn, drive_conf);
pci_read_config_dword(dev, drive_pci, &drive_conf);
printk("0x%08x\n", drive_conf);
#endif
} }
static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio) static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
......
...@@ -632,12 +632,3 @@ module_exit(sis5513_ide_exit); ...@@ -632,12 +632,3 @@ module_exit(sis5513_ide_exit);
MODULE_AUTHOR("Lionel Bouton, L C Chang, Andre Hedrick, Vojtech Pavlik"); MODULE_AUTHOR("Lionel Bouton, L C Chang, Andre Hedrick, Vojtech Pavlik");
MODULE_DESCRIPTION("PCI driver module for SIS IDE"); MODULE_DESCRIPTION("PCI driver module for SIS IDE");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
/*
* TODO:
* - CLEANUP
* - More checks in the config registers (force values instead of
* relying on the BIOS setting them correctly).
* - Further optimisations ?
* . for example ATA66+ regs 0x48 & 0x4A
*/
...@@ -24,13 +24,6 @@ ...@@ -24,13 +24,6 @@
#define DRV_NAME "sl82c105" #define DRV_NAME "sl82c105"
#undef DEBUG
#ifdef DEBUG
#define DBG(arg) printk arg
#else
#define DBG(fmt,...)
#endif
/* /*
* SL82C105 PCI config register 0x40 bits. * SL82C105 PCI config register 0x40 bits.
*/ */
...@@ -104,9 +97,6 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed) ...@@ -104,9 +97,6 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
unsigned long timings = (unsigned long)ide_get_drivedata(drive); unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u16 drv_ctrl; u16 drv_ctrl;
DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
drive->name, ide_xfer_verbose(speed)));
drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0]; drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
/* /*
...@@ -196,8 +186,6 @@ static void sl82c105_dma_start(ide_drive_t *drive) ...@@ -196,8 +186,6 @@ static void sl82c105_dma_start(ide_drive_t *drive)
struct pci_dev *dev = to_pci_dev(hwif->dev); struct pci_dev *dev = to_pci_dev(hwif->dev);
int reg = 0x44 + drive->dn * 4; int reg = 0x44 + drive->dn * 4;
DBG(("%s(drive:%s)\n", __func__, drive->name));
pci_write_config_word(dev, reg, pci_write_config_word(dev, reg,
(unsigned long)ide_get_drivedata(drive) >> 16); (unsigned long)ide_get_drivedata(drive) >> 16);
...@@ -209,8 +197,6 @@ static void sl82c105_dma_clear(ide_drive_t *drive) ...@@ -209,8 +197,6 @@ static void sl82c105_dma_clear(ide_drive_t *drive)
{ {
struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
DBG(("sl82c105_dma_clear(drive:%s)\n", drive->name));
sl82c105_reset_host(dev); sl82c105_reset_host(dev);
} }
...@@ -218,11 +204,7 @@ static int sl82c105_dma_end(ide_drive_t *drive) ...@@ -218,11 +204,7 @@ static int sl82c105_dma_end(ide_drive_t *drive)
{ {
struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
int reg = 0x44 + drive->dn * 4; int reg = 0x44 + drive->dn * 4;
int ret; int ret = ide_dma_end(drive);
DBG(("%s(drive:%s)\n", __func__, drive->name));
ret = ide_dma_end(drive);
pci_write_config_word(dev, reg, pci_write_config_word(dev, reg,
(unsigned long)ide_get_drivedata(drive)); (unsigned long)ide_get_drivedata(drive));
...@@ -239,8 +221,6 @@ static void sl82c105_resetproc(ide_drive_t *drive) ...@@ -239,8 +221,6 @@ static void sl82c105_resetproc(ide_drive_t *drive)
struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
u32 val; u32 val;
DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
pci_read_config_dword(dev, 0x40, &val); pci_read_config_dword(dev, 0x40, &val);
val |= (CTRL_P1F16 | CTRL_P0F16); val |= (CTRL_P1F16 | CTRL_P0F16);
pci_write_config_dword(dev, 0x40, val); pci_write_config_dword(dev, 0x40, val);
...@@ -291,8 +271,6 @@ static int init_chipset_sl82c105(struct pci_dev *dev) ...@@ -291,8 +271,6 @@ static int init_chipset_sl82c105(struct pci_dev *dev)
{ {
u32 val; u32 val;
DBG(("init_chipset_sl82c105()\n"));
pci_read_config_dword(dev, 0x40, &val); pci_read_config_dword(dev, 0x40, &val);
val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
pci_write_config_dword(dev, 0x40, val); pci_write_config_dword(dev, 0x40, val);
......
...@@ -91,8 +91,7 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) ...@@ -91,8 +91,7 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
if (!(reg48 & u_flag)) if (!(reg48 & u_flag))
pci_write_config_word(dev, 0x48, reg48|u_flag); pci_write_config_word(dev, 0x48, reg48|u_flag);
/* FIXME: (reg4a & a_speed) ? */ if ((reg4a & a_speed) != u_speed) {
if ((reg4a & u_speed) != u_speed) {
pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
pci_read_config_word(dev, 0x4a, &reg4a); pci_read_config_word(dev, 0x4a, &reg4a);
pci_write_config_word(dev, 0x4a, reg4a|u_speed); pci_write_config_word(dev, 0x4a, reg4a|u_speed);
......
...@@ -146,7 +146,7 @@ static int __init tx4938ide_probe(struct platform_device *pdev) ...@@ -146,7 +146,7 @@ static int __init tx4938ide_probe(struct platform_device *pdev)
return -ENODEV; return -ENODEV;
if (!devm_request_mem_region(&pdev->dev, res->start, if (!devm_request_mem_region(&pdev->dev, res->start,
res->end - res->start + 1, "tx4938ide")) resource_size(res), "tx4938ide"))
return -EBUSY; return -EBUSY;
mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
8 << pdata->ioport_shift); 8 << pdata->ioport_shift);
......
...@@ -125,8 +125,8 @@ struct ide_io_ports { ...@@ -125,8 +125,8 @@ struct ide_io_ports {
* Timeouts for various operations: * Timeouts for various operations:
*/ */
enum { enum {
/* spec allows up to 20ms */ /* spec allows up to 20ms, but CF cards and SSD drives need more */
WAIT_DRQ = HZ / 10, /* 100ms */ WAIT_DRQ = 1 * HZ, /* 1s */
/* some laptops are very slow */ /* some laptops are very slow */
WAIT_READY = 5 * HZ, /* 5s */ WAIT_READY = 5 * HZ, /* 5s */
/* should be less than 3ms (?), if all ATAPI CD is closed at boot */ /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
......
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