Commit e5aa8474 authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville

ath5k: define ath_common ops

Only common ath read/write ops go through the common ops.
Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 9adca126
...@@ -1315,17 +1315,21 @@ static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo) ...@@ -1315,17 +1315,21 @@ static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo)
return turbo ? (clock / 80) : (clock / 40); return turbo ? (clock / 80) : (clock / 40);
} }
/* static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
* Read from a register {
*/ return &ah->common;
}
static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
{
return &(ath5k_hw_common(ah)->regulatory);
}
static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
{ {
return ioread32(ah->ah_iobase + reg); return ioread32(ah->ah_iobase + reg);
} }
/*
* Write to a register
*/
static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg) static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
{ {
iowrite32(val, ah->ah_iobase + reg); iowrite32(val, ah->ah_iobase + reg);
......
...@@ -437,6 +437,22 @@ ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val) ...@@ -437,6 +437,22 @@ ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val)
return name; return name;
} }
static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset)
{
struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv;
return ath5k_hw_reg_read(ah, reg_offset);
}
static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
{
struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv;
ath5k_hw_reg_write(ah, val, reg_offset);
}
static const struct ath_ops ath5k_common_ops = {
.read = ath5k_ioread32,
.write = ath5k_iowrite32,
};
static int __devinit static int __devinit
ath5k_pci_probe(struct pci_dev *pdev, ath5k_pci_probe(struct pci_dev *pdev,
...@@ -576,6 +592,7 @@ ath5k_pci_probe(struct pci_dev *pdev, ...@@ -576,6 +592,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
sc->ah->ah_sc = sc; sc->ah->ah_sc = sc;
sc->ah->ah_iobase = sc->iobase; sc->ah->ah_iobase = sc->iobase;
common = ath5k_hw_common(sc->ah); common = ath5k_hw_common(sc->ah);
common->ops = &ath5k_common_ops;
common->cachelsz = csz << 2; /* convert to bytes */ common->cachelsz = csz << 2; /* convert to bytes */
/* Initialize device */ /* Initialize device */
......
...@@ -201,15 +201,4 @@ struct ath5k_softc { ...@@ -201,15 +201,4 @@ struct ath5k_softc {
#define ath5k_hw_hasveol(_ah) \ #define ath5k_hw_hasveol(_ah) \
(ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
{
return &ah->common;
}
static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
{
return &(ath5k_hw_common(ah)->regulatory);
}
#endif #endif
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