Commit e74b3f7d authored by David S. Miller's avatar David S. Miller
parents 13e620e0 59f8500e
...@@ -1844,7 +1844,7 @@ P: Haavard Skinnemoen ...@@ -1844,7 +1844,7 @@ P: Haavard Skinnemoen
M: hskinnemoen@atmel.com M: hskinnemoen@atmel.com
S: Supported S: Supported
GENERIC HDLC DRIVER, N2, C101, PCI200SYN and WANXL DRIVERS GENERIC HDLC (WAN) DRIVERS
P: Krzysztof Halasa P: Krzysztof Halasa
M: khc@pm.waw.pl M: khc@pm.waw.pl
W: http://www.kernel.org/pub/linux/utils/net/hdlc/ W: http://www.kernel.org/pub/linux/utils/net/hdlc/
...@@ -2243,6 +2243,11 @@ M: dan.j.williams@intel.com ...@@ -2243,6 +2243,11 @@ M: dan.j.williams@intel.com
L: linux-kernel@vger.kernel.org L: linux-kernel@vger.kernel.org
S: Supported S: Supported
INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
P: Krzysztof Halasa
M: khc@pm.waw.pl
S: Maintained
INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT
P: Deepak Saxena P: Deepak Saxena
M: dsaxena@plexity.net M: dsaxena@plexity.net
......
...@@ -12,6 +12,8 @@ ...@@ -12,6 +12,8 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#define DEBUG_QMGR 0
#define HALF_QUEUES 32 #define HALF_QUEUES 32
#define QUEUES 64 /* only 32 lower queues currently supported */ #define QUEUES 64 /* only 32 lower queues currently supported */
#define MAX_QUEUE_LENGTH 4 /* in dwords */ #define MAX_QUEUE_LENGTH 4 /* in dwords */
...@@ -61,22 +63,51 @@ void qmgr_enable_irq(unsigned int queue); ...@@ -61,22 +63,51 @@ void qmgr_enable_irq(unsigned int queue);
void qmgr_disable_irq(unsigned int queue); void qmgr_disable_irq(unsigned int queue);
/* request_ and release_queue() must be called from non-IRQ context */ /* request_ and release_queue() must be called from non-IRQ context */
#if DEBUG_QMGR
extern char qmgr_queue_descs[QUEUES][32];
int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
unsigned int nearly_empty_watermark, unsigned int nearly_empty_watermark,
unsigned int nearly_full_watermark); unsigned int nearly_full_watermark,
const char *desc_format, const char* name);
#else
int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
unsigned int nearly_empty_watermark,
unsigned int nearly_full_watermark);
#define qmgr_request_queue(queue, len, nearly_empty_watermark, \
nearly_full_watermark, desc_format, name) \
__qmgr_request_queue(queue, len, nearly_empty_watermark, \
nearly_full_watermark)
#endif
void qmgr_release_queue(unsigned int queue); void qmgr_release_queue(unsigned int queue);
static inline void qmgr_put_entry(unsigned int queue, u32 val) static inline void qmgr_put_entry(unsigned int queue, u32 val)
{ {
extern struct qmgr_regs __iomem *qmgr_regs; extern struct qmgr_regs __iomem *qmgr_regs;
#if DEBUG_QMGR
BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
printk(KERN_DEBUG "Queue %s(%i) put %X\n",
qmgr_queue_descs[queue], queue, val);
#endif
__raw_writel(val, &qmgr_regs->acc[queue][0]); __raw_writel(val, &qmgr_regs->acc[queue][0]);
} }
static inline u32 qmgr_get_entry(unsigned int queue) static inline u32 qmgr_get_entry(unsigned int queue)
{ {
u32 val;
extern struct qmgr_regs __iomem *qmgr_regs; extern struct qmgr_regs __iomem *qmgr_regs;
return __raw_readl(&qmgr_regs->acc[queue][0]); val = __raw_readl(&qmgr_regs->acc[queue][0]);
#if DEBUG_QMGR
BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
printk(KERN_DEBUG "Queue %s(%i) get %X\n",
qmgr_queue_descs[queue], queue, val);
#endif
return val;
} }
static inline int qmgr_get_stat1(unsigned int queue) static inline int qmgr_get_stat1(unsigned int queue)
......
...@@ -14,8 +14,6 @@ ...@@ -14,8 +14,6 @@
#include <linux/module.h> #include <linux/module.h>
#include <mach/qmgr.h> #include <mach/qmgr.h>
#define DEBUG 0
struct qmgr_regs __iomem *qmgr_regs; struct qmgr_regs __iomem *qmgr_regs;
static struct resource *mem_res; static struct resource *mem_res;
static spinlock_t qmgr_lock; static spinlock_t qmgr_lock;
...@@ -23,6 +21,10 @@ static u32 used_sram_bitmap[4]; /* 128 16-dword pages */ ...@@ -23,6 +21,10 @@ static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
static void (*irq_handlers[HALF_QUEUES])(void *pdev); static void (*irq_handlers[HALF_QUEUES])(void *pdev);
static void *irq_pdevs[HALF_QUEUES]; static void *irq_pdevs[HALF_QUEUES];
#if DEBUG_QMGR
char qmgr_queue_descs[QUEUES][32];
#endif
void qmgr_set_irq(unsigned int queue, int src, void qmgr_set_irq(unsigned int queue, int src,
void (*handler)(void *pdev), void *pdev) void (*handler)(void *pdev), void *pdev)
{ {
...@@ -70,6 +72,7 @@ void qmgr_disable_irq(unsigned int queue) ...@@ -70,6 +72,7 @@ void qmgr_disable_irq(unsigned int queue)
spin_lock_irqsave(&qmgr_lock, flags); spin_lock_irqsave(&qmgr_lock, flags);
__raw_writel(__raw_readl(&qmgr_regs->irqen[0]) & ~(1 << queue), __raw_writel(__raw_readl(&qmgr_regs->irqen[0]) & ~(1 << queue),
&qmgr_regs->irqen[0]); &qmgr_regs->irqen[0]);
__raw_writel(1 << queue, &qmgr_regs->irqstat[0]); /* clear */
spin_unlock_irqrestore(&qmgr_lock, flags); spin_unlock_irqrestore(&qmgr_lock, flags);
} }
...@@ -81,9 +84,16 @@ static inline void shift_mask(u32 *mask) ...@@ -81,9 +84,16 @@ static inline void shift_mask(u32 *mask)
mask[0] <<= 1; mask[0] <<= 1;
} }
#if DEBUG_QMGR
int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
unsigned int nearly_empty_watermark, unsigned int nearly_empty_watermark,
unsigned int nearly_full_watermark) unsigned int nearly_full_watermark,
const char *desc_format, const char* name)
#else
int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
unsigned int nearly_empty_watermark,
unsigned int nearly_full_watermark)
#endif
{ {
u32 cfg, addr = 0, mask[4]; /* in 16-dwords */ u32 cfg, addr = 0, mask[4]; /* in 16-dwords */
int err; int err;
...@@ -151,12 +161,13 @@ int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, ...@@ -151,12 +161,13 @@ int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
used_sram_bitmap[2] |= mask[2]; used_sram_bitmap[2] |= mask[2];
used_sram_bitmap[3] |= mask[3]; used_sram_bitmap[3] |= mask[3];
__raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]); __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]);
spin_unlock_irq(&qmgr_lock); #if DEBUG_QMGR
snprintf(qmgr_queue_descs[queue], sizeof(qmgr_queue_descs[0]),
#if DEBUG desc_format, name);
printk(KERN_DEBUG "qmgr: requested queue %i, addr = 0x%02X\n", printk(KERN_DEBUG "qmgr: requested queue %s(%i) addr = 0x%02X\n",
queue, addr); qmgr_queue_descs[queue], queue, addr);
#endif #endif
spin_unlock_irq(&qmgr_lock);
return 0; return 0;
err: err:
...@@ -189,6 +200,11 @@ void qmgr_release_queue(unsigned int queue) ...@@ -189,6 +200,11 @@ void qmgr_release_queue(unsigned int queue)
while (addr--) while (addr--)
shift_mask(mask); shift_mask(mask);
#if DEBUG_QMGR
printk(KERN_DEBUG "qmgr: releasing queue %s(%i)\n",
qmgr_queue_descs[queue], queue);
qmgr_queue_descs[queue][0] = '\x0';
#endif
__raw_writel(0, &qmgr_regs->sram[queue]); __raw_writel(0, &qmgr_regs->sram[queue]);
used_sram_bitmap[0] &= ~mask[0]; used_sram_bitmap[0] &= ~mask[0];
...@@ -199,9 +215,10 @@ void qmgr_release_queue(unsigned int queue) ...@@ -199,9 +215,10 @@ void qmgr_release_queue(unsigned int queue)
spin_unlock_irq(&qmgr_lock); spin_unlock_irq(&qmgr_lock);
module_put(THIS_MODULE); module_put(THIS_MODULE);
#if DEBUG
printk(KERN_DEBUG "qmgr: released queue %i\n", queue); while ((addr = qmgr_get_entry(queue)))
#endif printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
queue, addr);
} }
static int qmgr_init(void) static int qmgr_init(void)
...@@ -272,5 +289,10 @@ EXPORT_SYMBOL(qmgr_regs); ...@@ -272,5 +289,10 @@ EXPORT_SYMBOL(qmgr_regs);
EXPORT_SYMBOL(qmgr_set_irq); EXPORT_SYMBOL(qmgr_set_irq);
EXPORT_SYMBOL(qmgr_enable_irq); EXPORT_SYMBOL(qmgr_enable_irq);
EXPORT_SYMBOL(qmgr_disable_irq); EXPORT_SYMBOL(qmgr_disable_irq);
#if DEBUG_QMGR
EXPORT_SYMBOL(qmgr_queue_descs);
EXPORT_SYMBOL(qmgr_request_queue); EXPORT_SYMBOL(qmgr_request_queue);
#else
EXPORT_SYMBOL(__qmgr_request_queue);
#endif
EXPORT_SYMBOL(qmgr_release_queue); EXPORT_SYMBOL(qmgr_release_queue);
...@@ -59,7 +59,7 @@ config EP93XX_ETH ...@@ -59,7 +59,7 @@ config EP93XX_ETH
config IXP4XX_ETH config IXP4XX_ETH
tristate "Intel IXP4xx Ethernet support" tristate "Intel IXP4xx Ethernet support"
depends on ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR depends on ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR
select MII select PHYLIB
help help
Say Y here if you want to use built-in Ethernet ports Say Y here if you want to use built-in Ethernet ports
on IXP4xx processor. on IXP4xx processor.
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...@@ -335,6 +335,13 @@ config DSCC4_PCI_RST ...@@ -335,6 +335,13 @@ config DSCC4_PCI_RST
Say Y if your card supports this feature. Say Y if your card supports this feature.
config IXP4XX_HSS
tristate "Intel IXP4xx HSS (synchronous serial port) support"
depends on HDLC && ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR
help
Say Y here if you want to use built-in HSS ports
on IXP4xx processor.
config DLCI config DLCI
tristate "Frame Relay DLCI support" tristate "Frame Relay DLCI support"
---help--- ---help---
......
...@@ -41,6 +41,7 @@ obj-$(CONFIG_C101) += c101.o ...@@ -41,6 +41,7 @@ obj-$(CONFIG_C101) += c101.o
obj-$(CONFIG_WANXL) += wanxl.o obj-$(CONFIG_WANXL) += wanxl.o
obj-$(CONFIG_PCI200SYN) += pci200syn.o obj-$(CONFIG_PCI200SYN) += pci200syn.o
obj-$(CONFIG_PC300TOO) += pc300too.o obj-$(CONFIG_PC300TOO) += pc300too.o
obj-$(CONFIG_IXP4XX_HSS) += ixp4xx_hss.o
clean-files := wanxlfw.inc clean-files := wanxlfw.inc
$(obj)/wanxl.o: $(obj)/wanxlfw.inc $(obj)/wanxl.o: $(obj)/wanxlfw.inc
......
...@@ -303,7 +303,7 @@ static int cp_table[EVENTS][STATES] = { ...@@ -303,7 +303,7 @@ static int cp_table[EVENTS][STATES] = {
STA: RTR must supply id STA: RTR must supply id
SCJ: RUC must supply CP packet len and data */ SCJ: RUC must supply CP packet len and data */
static void ppp_cp_event(struct net_device *dev, u16 pid, u16 event, u8 code, static void ppp_cp_event(struct net_device *dev, u16 pid, u16 event, u8 code,
u8 id, unsigned int len, void *data) u8 id, unsigned int len, const void *data)
{ {
int old_state, action; int old_state, action;
struct ppp *ppp = get_ppp(dev); struct ppp *ppp = get_ppp(dev);
...@@ -374,11 +374,12 @@ static void ppp_cp_event(struct net_device *dev, u16 pid, u16 event, u8 code, ...@@ -374,11 +374,12 @@ static void ppp_cp_event(struct net_device *dev, u16 pid, u16 event, u8 code,
static void ppp_cp_parse_cr(struct net_device *dev, u16 pid, u8 id, static void ppp_cp_parse_cr(struct net_device *dev, u16 pid, u8 id,
unsigned int len, u8 *data) unsigned int req_len, const u8 *data)
{ {
static u8 const valid_accm[6] = { LCP_OPTION_ACCM, 6, 0, 0, 0, 0 }; static u8 const valid_accm[6] = { LCP_OPTION_ACCM, 6, 0, 0, 0, 0 };
u8 *opt, *out; const u8 *opt;
unsigned int nak_len = 0, rej_len = 0; u8 *out;
unsigned int len = req_len, nak_len = 0, rej_len = 0;
if (!(out = kmalloc(len, GFP_ATOMIC))) { if (!(out = kmalloc(len, GFP_ATOMIC))) {
dev->stats.rx_dropped++; dev->stats.rx_dropped++;
...@@ -423,7 +424,7 @@ static void ppp_cp_parse_cr(struct net_device *dev, u16 pid, u8 id, ...@@ -423,7 +424,7 @@ static void ppp_cp_parse_cr(struct net_device *dev, u16 pid, u8 id,
else if (nak_len) else if (nak_len)
ppp_cp_event(dev, pid, RCR_BAD, CP_CONF_NAK, id, nak_len, out); ppp_cp_event(dev, pid, RCR_BAD, CP_CONF_NAK, id, nak_len, out);
else else
ppp_cp_event(dev, pid, RCR_GOOD, CP_CONF_ACK, id, len, data); ppp_cp_event(dev, pid, RCR_GOOD, CP_CONF_ACK, id, req_len, data);
kfree(out); kfree(out);
} }
......
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