Commit e7c9bd1c authored by Golan Ben-Ami's avatar Golan Ben-Ami Committed by Luca Coelho

iwlwifi: mvm: write the correct internal TXF index

The TX fifos are arranged consecutively in the SMEM, beginning
with the regular fifos, and tailed by the internal fifos.
In the current code, while trying to read the internal fifos,
we read the fifos beginning with the index zero.
By doing this we actually re-read the regular fifos.

In order to read the internal fifos, start the reading index
from the number of regular fifos configured by the fw.
Signed-off-by: default avatarGolan Ben-Ami <golan.ben.ami@intel.com>
Fixes: 39654cb3 ("iwlwifi: don't access a nonexistent register upon assert")
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent d5d0689a
...@@ -288,7 +288,8 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm, ...@@ -288,7 +288,8 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
fifo_hdr->fifo_num = cpu_to_le32(i); fifo_hdr->fifo_num = cpu_to_le32(i);
/* Mark the number of TXF we're pulling now */ /* Mark the number of TXF we're pulling now */
iwl_trans_write_prph(mvm->trans, TXF_CPU2_NUM, i); iwl_trans_write_prph(mvm->trans, TXF_CPU2_NUM, i +
ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size));
fifo_hdr->available_bytes = fifo_hdr->available_bytes =
cpu_to_le32(iwl_trans_read_prph(mvm->trans, cpu_to_le32(iwl_trans_read_prph(mvm->trans,
......
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