Merge tag 'tegra-for-5.6-soc' of...

Merge tag 'tegra-for-5.6-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc: tegra: Changes for v5.6-rc1

This adds a couple of optimizations to how the chip ID and straps are
read and adds support for the FUSE block on Tegra194. Included is also a
small optimization for the coupled regulator driver to abort early if no
voltage change has occurred.

* tag 'tegra-for-5.6-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  soc/tegra: regulators: Do nothing if voltage is unchanged
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  soc/tegra: fuse: Add Tegra194 support

Link: https://lore.kernel.org/r/20200111003553.2411874-4-thierry.reding@gmail.comSigned-off-by: Olof Johansson <olof@lixom.net>

drivers/soc/tegra/Kconfig

@@ -126,6 +126,7 @@ config SOC_TEGRA_FUSE
 	def_bool y
 	depends on ARCH_TEGRA
 	select SOC_BUS
+	select TEGRA20_APB_DMA if ARCH_TEGRA_2x_SOC
 
 config SOC_TEGRA_FLOWCTRL
 	bool

drivers/soc/tegra/fuse/fuse-tegra.c

@@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
 };
 
 static const struct of_device_id tegra_fuse_match[] = {
+#ifdef CONFIG_ARCH_TEGRA_194_SOC
+	{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
+#endif
 #ifdef CONFIG_ARCH_TEGRA_186_SOC
 	{ .compatible = "nvidia,tegra186-efuse", .data = &tegra186_fuse_soc },
 #endif

drivers/soc/tegra/fuse/fuse-tegra30.c

@@ -320,3 +320,32 @@ const struct tegra_fuse_soc tegra186_fuse_soc = {
 	.num_lookups = ARRAY_SIZE(tegra186_fuse_lookups),
 };
 #endif
+
+#if defined(CONFIG_ARCH_TEGRA_194_SOC)
+static const struct nvmem_cell_lookup tegra194_fuse_lookups[] = {
+	{
+		.nvmem_name = "fuse",
+		.cell_name = "xusb-pad-calibration",
+		.dev_id = "3520000.padctl",
+		.con_id = "calibration",
+	}, {
+		.nvmem_name = "fuse",
+		.cell_name = "xusb-pad-calibration-ext",
+		.dev_id = "3520000.padctl",
+		.con_id = "calibration-ext",
+	},
+};
+
+static const struct tegra_fuse_info tegra194_fuse_info = {
+	.read = tegra30_fuse_read,
+	.size = 0x300,
+	.spare = 0x280,
+};
+
+const struct tegra_fuse_soc tegra194_fuse_soc = {
+	.init = tegra30_fuse_init,
+	.info = &tegra194_fuse_info,
+	.lookups = tegra194_fuse_lookups,
+	.num_lookups = ARRAY_SIZE(tegra194_fuse_lookups),
+};
+#endif

drivers/soc/tegra/fuse/fuse.h

@@ -108,4 +108,8 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
 extern const struct tegra_fuse_soc tegra186_fuse_soc;
 #endif
 
+#ifdef CONFIG_ARCH_TEGRA_194_SOC
+extern const struct tegra_fuse_soc tegra194_fuse_soc;
+#endif
+
 #endif

drivers/soc/tegra/fuse/tegra-apbmisc.c

@@ -21,18 +21,15 @@
 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT	\
 	(0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
 
-static void __iomem *apbmisc_base;
-static void __iomem *strapping_base;
 static bool long_ram_code;
+static u32 strapping;
+static u32 chipid;
 
 u32 tegra_read_chipid(void)
 {
-	if (!apbmisc_base) {
-		WARN(1, "Tegra Chip ID not yet available\n");
-		return 0;
-	}
+	WARN(!chipid, "Tegra ABP MISC not yet available\n");
 
-	return readl_relaxed(apbmisc_base + 4);
+	return chipid;
 }
 
 u8 tegra_get_chip_id(void)
@@ -42,10 +39,9 @@ u8 tegra_get_chip_id(void)
 
 u32 tegra_read_straps(void)
 {
-	if (strapping_base)
-		return readl_relaxed(strapping_base);
-	else
-		return 0;
+	WARN(!chipid, "Tegra ABP MISC not yet available\n");
+
+	return strapping;
 }
 
 u32 tegra_read_ram_code(void)
@@ -63,6 +59,7 @@ u32 tegra_read_ram_code(void)
 static const struct of_device_id apbmisc_match[] __initconst = {
 	{ .compatible = "nvidia,tegra20-apbmisc", },
 	{ .compatible = "nvidia,tegra186-misc", },
+	{ .compatible = "nvidia,tegra194-misc", },
 	{},
 };
 
@@ -103,6 +100,7 @@ void __init tegra_init_revision(void)
 
 void __init tegra_init_apbmisc(void)
 {
+	void __iomem *apbmisc_base, *strapping_base;
 	struct resource apbmisc, straps;
 	struct device_node *np;
 
@@ -123,7 +121,7 @@ void __init tegra_init_apbmisc(void)
 			apbmisc.flags = IORESOURCE_MEM;
 
 			/* strapping options */
-			if (tegra_get_chip_id() == TEGRA124) {
+			if (of_machine_is_compatible("nvidia,tegra124")) {
 				straps.start = 0x7000e864;
 				straps.end = 0x7000e867;
 			} else {
@@ -160,12 +158,20 @@ void __init tegra_init_apbmisc(void)
 	}
 
 	apbmisc_base = ioremap_nocache(apbmisc.start, resource_size(&apbmisc));
-	if (!apbmisc_base)
+	if (!apbmisc_base) {
 		pr_err("failed to map APBMISC registers\n");
+	} else {
+		chipid = readl_relaxed(apbmisc_base + 4);
+		iounmap(apbmisc_base);
+	}
 
 	strapping_base = ioremap_nocache(straps.start, resource_size(&straps));
-	if (!strapping_base)
+	if (!strapping_base) {
 		pr_err("failed to map strapping options registers\n");
+	} else {
+		strapping = readl_relaxed(strapping_base);
+		iounmap(strapping_base);
+	}
 
 	long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code");
 }

drivers/soc/tegra/regulators-tegra20.c

@@ -162,6 +162,9 @@ static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra,
 			core_target_uV = max(rtc_uV - max_spread, core_target_uV);
 		}
 
+		if (core_uV == core_target_uV)
+			goto update_rtc;
+
 		err = regulator_set_voltage_rdev(core_rdev,
 						 core_target_uV,
 						 core_max_uV,
@@ -170,7 +173,7 @@ static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra,
 			return err;
 
 		core_uV = core_target_uV;
-
+update_rtc:
 		if (rtc_uV < rtc_min_uV) {
 			rtc_target_uV = min(rtc_uV + max_spread, rtc_min_uV);
 			rtc_target_uV = min(core_uV + max_spread, rtc_target_uV);
@@ -179,6 +182,9 @@ static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra,
 			rtc_target_uV = max(core_uV - max_spread, rtc_target_uV);
 		}
 
+		if (rtc_uV == rtc_target_uV)
+			continue;
+
 		err = regulator_set_voltage_rdev(rtc_rdev,
 						 rtc_target_uV,
 						 rtc_max_uV,

drivers/soc/tegra/regulators-tegra30.c

@@ -209,6 +209,9 @@ static int tegra30_voltage_update(struct tegra_regulator_coupler *tegra,
 			cpu_target_uV = max(core_uV - max_spread, cpu_target_uV);
 		}
 
+		if (cpu_uV == cpu_target_uV)
+			goto update_core;
+
 		err = regulator_set_voltage_rdev(cpu_rdev,
 						 cpu_target_uV,
 						 cpu_max_uV,
@@ -231,6 +234,9 @@ static int tegra30_voltage_update(struct tegra_regulator_coupler *tegra,
 			core_target_uV = max(core_target_uV, core_uV - core_max_step);
 		}
 
+		if (core_uV == core_target_uV)
+			continue;
+
 		err = regulator_set_voltage_rdev(core_rdev,
 						 core_target_uV,
 						 core_max_uV,