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Commit e9479a8d authored by Russell King's avatar Russell King
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[ARM] Remove NexusPCI/FTVPCI platform. 

This platform is no longer maintained, and its maintainer says that
the hardware is obsolete and out of circulation.
parent c93f8313
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Showing with 4 additions and 784 deletions
arch/arm/Kconfig
View file @ e9479a8d
......@@ -257,7 +257,7 @@ config DISCONTIGMEM
# Now handle the bus types
config PCI
bool "PCI support" if ARCH_INTEGRATOR_AP
default y if ARCH_FTVPCI || ARCH_SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX
default y if ARCH_SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
......@@ -270,11 +270,6 @@ config PCI
doesn't.
# Select the host bridge type
config PCI_HOST_PLX90X0
bool
depends on PCI && ARCH_FTVPCI
default y
config PCI_HOST_VIA82C505
bool
depends on PCI && ARCH_SHARK
......@@ -550,7 +545,7 @@ config CMDLINE
config LEDS
bool "Timer and CPU usage LEDs"
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
help
If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status.
......@@ -564,7 +559,7 @@ config LEDS
config LEDS_TIMER
bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || MACH_MAINSTONE || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB)
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
default y if ARCH_EBSA110
help
If you say Y here, one of the system LEDs (the green one on the
......@@ -620,7 +615,7 @@ source "drivers/acorn/block/Kconfig"
source "net/Kconfig"
if ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_L7200 || ARCH_LH7A40X || ARCH_FTVPCI || ARCH_PXA || ARCH_RPC || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE
if ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE
source "drivers/ide/Kconfig"
endif
......
arch/arm/Makefile
View file @ e9479a8d
......@@ -74,8 +74,6 @@ textaddr-y := 0xC0008000
textaddr-$(CONFIG_ARCH_CO285) := 0x60008000
machine-$(CONFIG_ARCH_CO285) := footbridge
incdir-$(CONFIG_ARCH_CO285) := ebsa285
machine-$(CONFIG_ARCH_FTVPCI) := ftvpci
incdir-$(CONFIG_ARCH_FTVPCI) := nexuspci
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SA1100) := sa1100
ifeq ($(CONFIG_ARCH_SA1100),y)
......
arch/arm/common/Makefile
View file @ e9479a8d
......@@ -6,6 +6,5 @@ obj-y += platform.o
obj-$(CONFIG_ARM_AMBA) += amba.o
obj-$(CONFIG_ICST525) += icst525.o
obj-$(CONFIG_SA1111) += sa1111.o
obj-$(CONFIG_PCI_HOST_PLX90X0) += plx90x0.o
obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
obj-$(CONFIG_DMABOUNCE) += dmabounce.o
arch/arm/common/plx90x0.c deleted 100644 → 0
View file @ c93f8313
/*
* Driver for PLX Technology PCI9000-series host bridge.
*
* Copyright (C) 1997, 1998, 1999, 2000 FutureTV Labs Ltd
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
/*
* Since the following functions are all very similar, the common parts
* are pulled out into these macros.
*/
#define PLX_CLEAR_CONFIG \
__raw_writel(0, PLX_BASE + 0xac); \
local_irq_restore(flags); }
#define PLX_SET_CONFIG \
{ unsigned long flags; \
local_irq_save(flags); \
__raw_writel((1<<31 | (bus->number << 16) \
| (devfn << 8) | (where & ~3) \
| ((bus->number == 0)?0:1)), PLX_BASE + 0xac); \
#define PLX_CONFIG_WRITE(size) \
PLX_SET_CONFIG \
__raw_write##size(value, PCIO_BASE + (where & 3)); \
if (__raw_readw(PLX_BASE + 0x6) & 0x2000) \
__raw_writew(0x2000, PLX_BASE + 0x6); \
PLX_CLEAR_CONFIG \
return PCIBIOS_SUCCESSFUL;
#define PLX_CONFIG_READ(size) \
PLX_SET_CONFIG \
*value = __raw_read##size(PCIO_BASE + (where & 3)); \
if (__raw_readw(PLX_BASE + 0x6) & 0x2000) { \
__raw_writew(0x2000, PLX_BASE + 0x6); \
*value = 0xffffffffUL; \
} \
PLX_CLEAR_CONFIG \
return PCIBIOS_SUCCESSFUL;
/* Configuration space access routines */
static int
plx90x0_read_config (struct pci_bus *bus, unsigned int devfn, int where,
int where, int size, u32 *value)
{
switch (size) {
case 1:
PLX_CONFIG_READ(b)
break;
case 2:
PLX_CONFIG_READ(w)
break;
case 4:
PLX_CONFIG_READ(l)
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int
plx90x0_write_config (struct pci_bus *bus, unsigned int devfn, int where,
int where, int size, u32 value)
{
switch (size) {
case 1:
PLX_CONFIG_WRITE(b)
break;
case 2:
PLX_CONFIG_WRITE(w)
break;
case 4:
PLX_CONFIG_WRITE(l)
break;
}
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops plx90x0_ops =
{
.read = plx90x0_read_config,
.write = plx90x0_write_config,
};
static void
plx_syserr_handler(int irq, void *handle, struct pt_regs *regs)
{
printk("PLX90x0: machine check %04x (pc=%08lx)\n",
readw(PLX_BASE + 6), regs->ARM_pc);
__raw_writew(0xf000, PLX_BASE + 6);
}
/*
* Initialise the PCI system.
*/
void __init
plx90x0_init(struct arm_sysdata *sysdata)
{
static const unsigned long int base = PLX_BASE;
char *what;
unsigned long bar = (unsigned long)virt_to_bus((void *)PAGE_OFFSET);
/* Have a sniff around and see which PLX device is present. */
unsigned long id = __raw_readl(base + 0xf0);
#if 0
/* This check was a good idea, but can fail. The PLX9060 puts no
default value in these registers unless NB# is asserted (which it
isn't on these cards). */
if ((id & 0xffff) != PCI_VENDOR_ID_PLX)
return; /* Nothing found */
#endif
/* Found one - now work out what it is. */
switch (id >> 16) {
case 0: /* PCI_DEVICE_ID_PLX_9060 */
what = "PCI9060";
break;
case PCI_DEVICE_ID_PLX_9060ES:
what = "PCI9060ES";
break;
case PCI_DEVICE_ID_PLX_9060SD:
what = "PCI9060SD"; /* uhuhh.. */
break;
case PCI_DEVICE_ID_PLX_9080:
what = "PCI9080";
break;
default:
printk("PCI: Unknown PLX device %04lx found -- ignored.\n",
id >> 16);
return;
}
printk("PCI: PLX Technology %s host bridge found.\n", what);
/* Now set it up for both master and slave accesses. */
__raw_writel(0xffff0147, base + 0x4);
__raw_writeb(32, base + 0xd);
__raw_writel(0x8 | bar, base + 0x18);
__raw_writel(0xf8000008, base + 0x80);
__raw_writel(0x40000001, base + 0x84);
__raw_writel(0, base + 0x88);
__raw_writel(0, base + 0x8c);
__raw_writel(0x11, base + 0x94);
__raw_writel(0xC3 + (4 << 28)
+ (8 << 11) + (1 << 10)
+ (1 << 24), base + 0x98);
__raw_writel(0xC0000000, base + 0x9c);
__raw_writel(PLX_MEM_START, base + 0xa0);
__raw_writel(PLX_IO_START, base + 0xa4);
__raw_writel(0x3, base + 0xa8);
__raw_writel(0, base + 0xac);
__raw_writel(0x10001, base + 0xe8);
__raw_writel(0x8000767e, base + 0xec);
request_irq(IRQ_SYSERR, plx_syserr_handler, 0,
"system error", NULL);
pci_scan_bus(0, &plx90x0_ops, sysdata);
}
arch/arm/mach-ftvpci/Makefile deleted 100644 → 0
View file @ c93f8313
#
# Makefile for the linux kernel.
#
# Object file lists.
obj-y := core.o
obj-m :=
obj-n :=
obj- :=
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_LEDS) += leds.o
arch/arm/mach-ftvpci/core.c deleted 100644 → 0
View file @ c93f8313
/*
* linux/arch/arm/mach-ftvpci/core.c
*
* Architecture specific fixups.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
extern unsigned long soft_irq_mask;
static const unsigned char irq_cmd[] =
{
INTCONT_IRQ_DUART,
INTCONT_IRQ_PLX,
INTCONT_IRQ_D,
INTCONT_IRQ_C,
INTCONT_IRQ_B,
INTCONT_IRQ_A,
INTCONT_IRQ_SYSERR
};
static void ftvpci_mask_irq(unsigned int irq)
{
__raw_writel(irq_cmd[irq], INTCONT_BASE);
soft_irq_mask &= ~(1<<irq);
}
static void ftvpci_unmask_irq(unsigned int irq)
{
soft_irq_mask |= (1<<irq);
__raw_writel(irq_cmd[irq] | 1, INTCONT_BASE);
}
static void __init ftvpci_init_irq(void)
{
unsigned int i;
/* Mask all FIQs */
__raw_writel(INTCONT_FIQ_PLX, INTCONT_BASE);
__raw_writel(INTCONT_FIQ_D, INTCONT_BASE);
__raw_writel(INTCONT_FIQ_C, INTCONT_BASE);
__raw_writel(INTCONT_FIQ_B, INTCONT_BASE);
__raw_writel(INTCONT_FIQ_A, INTCONT_BASE);
__raw_writel(INTCONT_FIQ_SYSERR, INTCONT_BASE);
/* Disable all interrupts initially. */
for (i = 0; i < NR_IRQS; i++) {
if (i >= FIRST_IRQ && i <= LAST_IRQ) {
irq_desc[i].valid = 1;
irq_desc[i].probe_ok = 1;
irq_desc[i].mask_ack = ftvpci_mask_irq;
irq_desc[i].mask = ftvpci_mask_irq;
irq_desc[i].unmask = ftvpci_unmask_irq;
ftvpci_mask_irq(i);
} else {
irq_desc[i].valid = 0;
irq_desc[i].probe_ok = 0;
}
}
}
static struct map_desc ftvpci_io_desc[] __initdata = {
{ INTCONT_BASE, INTCONT_START, 0x00001000, MT_DEVICE },
{ PLX_BASE, PLX_START, 0x00001000, MT_DEVICE },
{ PCIO_BASE, PLX_IO_START, 0x00100000, MT_DEVICE },
{ DUART_BASE, DUART_START, 0x00001000, MT_DEVICE },
{ STATUS_BASE, STATUS_START, 0x00001000, MT_DEVICE }
};
static void __init ftvpci_map_io(void)
{
iotable_init(ftvpci_io_desc, ARRAY_SIZE(ftvpci_io_desc));
}
MACHINE_START(NEXUSPCI, "FTV/PCI")
MAINTAINER("Philip Blundell")
BOOT_MEM(0x40000000, 0x10000000, 0xe0000000)
MAPIO(ftvpci_map_io)
INITIRQ(ftvpci_init_irq)
MACHINE_END
arch/arm/mach-ftvpci/leds.c deleted 100644 → 0
View file @ c93f8313
/*
* linux/arch/arm/kernel/leds-ftvpci.c
*
* Copyright (C) 1999 FutureTV Labs Ltd
*/
#include <linux/module.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/leds.h>
#include <asm/system.h>
#include <asm/io.h>
static void ftvpci_leds_event(led_event_t ledevt)
{
static int led_state = 0;
switch(ledevt) {
case led_timer:
led_state ^= 1;
raw_writeb(0x1a | led_state, INTCONT_BASE);
break;
default:
break;
}
}
static int __init ftvpci_leds_init(void)
{
leds_event = ftvpci_leds_event;
return 0;
}
arch_initcall(ftvpci_leds_init);
arch/arm/mach-ftvpci/pci.c deleted 100644 → 0
View file @ c93f8313
/*
* linux/arch/arm/kernel/ftv-pci.c
*
* PCI bios-type initialisation for PCI machines
*
* Bits taken from various places.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/*
* Owing to a PCB cockup, issue A backplanes are wired thus:
*
* Slot 1 2 3 4 5 Bridge S1 S2 S3 S4
* IRQ D C B A A C B A D
* A D C B B D C B A
* B A D C C A D C B
* C B A D D B A D C
*
* ID A31 A30 A29 A28 A27 A26 DEV4 DEV5 DEV6 DEV7
*
* Actually, this isn't too bad, because with the processor card
* in slot 5 on the primary bus, the IRQs rotate on both sides
* as you'd expect.
*/
static int irqmap_ftv[] __initdata = { IRQ_PCI_D, IRQ_PCI_C, IRQ_PCI_B, IRQ_PCI_A };
static int __init ftv_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
if (slot > 0x10)
slot--;
return irqmap_ftv[(slot - pin) & 3];
}
static u8 __init ftv_swizzle(struct pci_dev *dev, u8 *pin)
{
return PCI_SLOT(dev->devfn);
}
/* ftv host-specific stuff */
static struct hw_pci ftv_pci __initdata = {
.init = plx90x0_init,
.swizzle = ftv_swizzle,
.map_irq = ftv_map_irq,
};
static int __init ftv_pci_init(void)
{
if (machine_is_ftvpci())
pci_common_init(&ftv_pci);
return 0;
}
subsys_initcall(ftv_pci_init);
include/asm-arm/arch-nexuspci/dma.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/dma.h
*
* Architecture DMA routines
*
* Copyright (C) 1998, 1999 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/*
* This is the maximum DMA address that can be DMAd to.
*/
#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
include/asm-arm/arch-nexuspci/hardware.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/hardware.h
*
* Copyright (C) 1998, 1999, 2000 FutureTV Labs Ltd.
*
* This file contains the hardware definitions of the FTV PCI card.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
/* Logical Physical
* 0xffe00000 0x20000000 INTCONT
* 0xffd00000 0x30000000 Status
* 0xffc00000 0x60000000 PLX registers
* 0xfe000000 0xC0000000 PCI I/O
* 0xfd000000 0x70000000 cache flush
* 0xfc000000 0x80000000 PCI/ISA memory
* 0xe0000000 0x10000000 SCC2691 DUART
*/
/*
* Mapping areas
*/
#define INTCONT_BASE 0xffe00000
#define STATUS_BASE 0xffd00000
#define PLX_BASE 0xffc00000
#define PCIO_BASE 0xfe000000
#define FLUSH_BASE 0xfd000000
#define DUART_BASE 0xe0000000
#define PCIMEM_BASE 0xfc000000
#define PLX_IO_START 0xC0000000
#define PLX_MEM_START 0x80000000
#define PLX_START 0x60000000
#define STATUS_START 0x30000000
#define INTCONT_START 0x20000000
#define DUART_START 0x10000000
/*
* RAM definitions
*/
#define RAM_BASE 0x40000000
#define FLUSH_BASE_PHYS 0x70000000
/*
* Miscellaneous INTCONT bits
*/
#define INTCONT_FIQ_PLX 0x00
#define INTCONT_FIQ_D 0x02
#define INTCONT_FIQ_C 0x04
#define INTCONT_FIQ_B 0x06
#define INTCONT_FIQ_A 0x08
#define INTCONT_FIQ_SYSERR 0x0a
#define INTCONT_IRQ_DUART 0x0c
#define INTCONT_IRQ_PLX 0x0e
#define INTCONT_IRQ_D 0x10
#define INTCONT_IRQ_C 0x12
#define INTCONT_IRQ_B 0x14
#define INTCONT_IRQ_A 0x16
#define INTCONT_IRQ_SYSERR 0x1e
#define INTCONT_WATCHDOG 0x18
#define INTCONT_LED 0x1a
#define INTCONT_PCI_RESET 0x1c
#define UNCACHEABLE_ADDR STATUS_BASE
#endif
include/asm-arm/arch-nexuspci/io.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/io.h
*
* Copyright (C) 1997-1999 Russell King
* Copyright (C) 2000 FutureTV Labs Ltd.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffff
/*
* Translation of various region addresses to virtual addresses
*/
#define __io(a) (PCIO_BASE + (a))
#if 1
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a))
#else
static inline unsigned long ___mem_pci(unsigned long a)
{
/* PCI addresses must have been ioremapped */
if (a <= 0xc0000000 || a >= 0xe0000000)
*((int *)0) = 0;
return a;
}
static inline unsigned long ___mem_isa(unsigned long a)
{
BUG_ON(a >= 16*1048576);
return PCIMEM_BASE + a;
}
#define __mem_pci(a) ___mem_pci((unsigned long)(a))
#define __mem_isa(a) ___mem_isa((unsigned long)(a))
#endif
/*
* ioremap support - validate a PCI memory address,
* and convert a PCI memory address to a physical
* address for the page tables.
*/
#define iomem_valid_addr(iomem,sz) \
((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000)
#define iomem_to_phys(iomem) ((iomem) + PLX_MEM_START)
#define __arch_ioremap(off,sz,nocache) \
({ \
unsigned long _off = (off), _size = (sz); \
void *_ret = (void *)0; \
if (iomem_valid_addr(_off, _size)) \
_ret = __ioremap(iomem_to_phys(_off),_size,0); \
_ret; \
})
#define __arch_iounmap __iounmap
#endif
include/asm-arm/arch-nexuspci/irqs.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/irqs.h
*
* Copyright (C) 1997, 1998, 2000 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/*
* The hardware is capable of routing any interrupt source (except the
* DUART) to either IRQ or FIQ. We ignore FIQ and use IRQ exclusively
* for simplicity.
*/
#define IRQ_DUART 0
#define IRQ_PLX 1
#define IRQ_PCI_D 2
#define IRQ_PCI_C 3
#define IRQ_PCI_B 4
#define IRQ_PCI_A 5
#define IRQ_SYSERR 6 /* only from IOSLAVE rev B */
#define FIRST_IRQ IRQ_DUART
#define LAST_IRQ IRQ_SYSERR
/* timer is part of the DUART */
#define IRQ_TIMER IRQ_DUART
#define irq_canonicalize(i) (i)
include/asm-arm/arch-nexuspci/memory.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/memory.h
*
* Copyright (c) 1997, 1998, 2000 FutureTV Labs Ltd.
* Copyright (c) 1999 Russell King
*
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x40000000UL)
#define BUS_OFFSET (0xe0000000UL)
/*
* On the PCI bus the DRAM appears at address 0xe0000000
*/
#define __virt_to_bus(x) ((unsigned long)(x) - PAGE_OFFSET + BUS_OFFSET)
#define __bus_to_virt(x) ((unsigned long)(x) + PAGE_OFFSET - BUS_OFFSET)
#endif
include/asm-arm/arch-nexuspci/param.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/param.h
*/
include/asm-arm/arch-nexuspci/system.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/system.h
*
* Copyright (c) 1996, 97, 98, 99, 2000 FutureTV Labs Ltd.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#define arch_reset(mode) do { } while (0)
#endif
include/asm-arm/arch-nexuspci/time.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/time.h
*
* Copyright (c) 1997, 1998, 1999, 2000 FutureTV Labs Ltd.
*
* The FTV PCI card has no real-time clock. We get timer ticks from the
* SCC chip.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
static irqreturn_t
timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
static int count = 25;
unsigned char stat = __raw_readb(DUART_BASE + 0x14);
if (!(stat & 0x10))
return; /* Not for us */
/* Reset counter */
__raw_writeb(0x90, DUART_BASE + 8);
if (--count == 0) {
static int state = 1;
state ^= 1;
__raw_writeb(0x1a + state, INTCONT_BASE);
__raw_writeb(0x18 + state, INTCONT_BASE);
count = 50;
}
/* Wait for slow rise time */
__raw_readb(DUART_BASE + 0x14);
__raw_readb(DUART_BASE + 0x14);
__raw_readb(DUART_BASE + 0x14);
__raw_readb(DUART_BASE + 0x14);
__raw_readb(DUART_BASE + 0x14);
__raw_readb(DUART_BASE + 0x14);
do_timer(regs);
return IRQ_HANDLED;
}
void __init time_init(void)
{
int tick = 3686400 / 16 / 2 / 100;
__raw_writeb(tick & 0xff, DUART_BASE + 0x1c);
__raw_writeb(tick >> 8, DUART_BASE + 0x18);
__raw_writeb(0x80, DUART_BASE + 8);
__raw_writeb(0x10, DUART_BASE + 0x14);
timer_irq.handler = timer_interrupt;
timer_irq.flags = SA_SHIRQ;
setup_irq(IRQ_TIMER, &timer_irq);
}
include/asm-arm/arch-nexuspci/timex.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/timex.h
*
* NexusPCI StrongARM card timex specifications
*
* Copyright (C) 1998 Philip Blundell
*/
include/asm-arm/arch-nexuspci/uncompress.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/uncompress.h
*
* Copyright (C) 1998, 1999, 2000 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <asm/hardware.h>
#include <asm/io.h>
/*
* Write a character to the UART
*/
void _ll_write_char(char c)
{
while (!(__raw_readb(DUART_START + 0x4) & 0x4))
;
__raw_writeb(c, DUART_START + 0xc);
}
/*
* This does not append a newline
*/
static void puts(const char *s)
{
while (*s) {
if (*s == '\n')
_ll_write_char('\r');
_ll_write_char(*(s++));
}
}
/*
* Set up for decompression
*/
static void arch_decomp_setup(void)
{
/* LED off */
__raw_writel(INTCONT_LED, INTCONT_START);
/* Set up SCC */
__raw_writeb(42, DUART_START + 8);
__raw_writeb(48, DUART_START + 8);
__raw_writeb(16, DUART_START + 8);
__raw_writeb(0x93, DUART_START);
__raw_writeb(0x17, DUART_START);
__raw_writeb(0xbb, DUART_START + 4);
__raw_writeb(0x78, DUART_START + 16);
__raw_writeb(0xa0, DUART_START + 8);
__raw_writeb(5, DUART_START + 8);
}
/*
* Stroke the watchdog so we don't get reset during decompression.
*/
static inline void arch_decomp_wdog(void)
{
__raw_writel(INTCONT_WATCHDOG, INTCONT_START);
__raw_writel(INTCONT_WATCHDOG | 1, INTCONT_START);
}
include/asm-arm/arch-nexuspci/vmalloc.h deleted 100644 → 0
View file @ c93f8313
/*
* linux/include/asm-arm/arch-nexuspci/vmalloc.h
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x20000000)
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