Commit e9c58fc5 authored by Paul Mundt's avatar Paul Mundt

sh: Use the generic I/O port base for slowdown.

This fixes up the build and behaviour for various configurations. Namely
the CONFIG_32BIT cases where legacy mappings do not exist, as well as the
sh64 build.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent c4e708dc
......@@ -90,15 +90,11 @@
#define ctrl_outl __raw_writel
#define ctrl_outq __raw_writeq
extern unsigned long generic_io_base;
static inline void ctrl_delay(void)
{
#ifdef CONFIG_CPU_SH4
__raw_readw(CCN_PVR);
#elif defined(P2SEG)
__raw_readw(P2SEG);
#else
#error "Need a dummy address for delay"
#endif
__raw_readw(generic_io_base);
}
#define __BUILD_MEMORY_STRING(bwlq, type) \
......@@ -186,8 +182,6 @@ __BUILD_MEMORY_STRING(q, u64)
#define IO_SPACE_LIMIT 0xffffffff
extern unsigned long generic_io_base;
/*
* This function provides a method for the generic case where a
* board-specific ioport_map simply needs to return the port + some
......
......@@ -24,7 +24,7 @@
#define dummy_read()
#endif
unsigned long generic_io_base;
unsigned long generic_io_base = 0;
u8 generic_inb(unsigned long port)
{
......@@ -147,8 +147,10 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
{
#ifdef P1SEG
if (PXSEG(addr) >= P1SEG)
return (void __iomem *)addr;
#endif
return (void __iomem *)(addr + generic_io_base);
}
......
......@@ -135,5 +135,9 @@ void __init sh_mv_setup(void)
if (!sh_mv.mv_nr_irqs)
sh_mv.mv_nr_irqs = NR_IRQS;
#ifdef P2SEG
__set_io_port_base(P2SEG);
#else
__set_io_port_base(0);
#endif
}
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment