Commit ea5e4c87 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu: remove some more semaphore leftovers

No longer needed since semaphores were removed.
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarChunming Zhou <David1.Zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cadf97b1
...@@ -84,7 +84,6 @@ extern int amdgpu_vm_fault_stop; ...@@ -84,7 +84,6 @@ extern int amdgpu_vm_fault_stop;
extern int amdgpu_vm_debug; extern int amdgpu_vm_debug;
extern int amdgpu_sched_jobs; extern int amdgpu_sched_jobs;
extern int amdgpu_sched_hw_submission; extern int amdgpu_sched_hw_submission;
extern int amdgpu_enable_semaphores;
extern int amdgpu_powerplay; extern int amdgpu_powerplay;
#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000 #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
...@@ -188,7 +187,6 @@ struct amdgpu_fence; ...@@ -188,7 +187,6 @@ struct amdgpu_fence;
struct amdgpu_ib; struct amdgpu_ib;
struct amdgpu_vm; struct amdgpu_vm;
struct amdgpu_ring; struct amdgpu_ring;
struct amdgpu_semaphore;
struct amdgpu_cs_parser; struct amdgpu_cs_parser;
struct amdgpu_job; struct amdgpu_job;
struct amdgpu_irq_src; struct amdgpu_irq_src;
...@@ -333,9 +331,6 @@ struct amdgpu_ring_funcs { ...@@ -333,9 +331,6 @@ struct amdgpu_ring_funcs {
struct amdgpu_ib *ib); struct amdgpu_ib *ib);
void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr, void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
uint64_t seq, unsigned flags); uint64_t seq, unsigned flags);
bool (*emit_semaphore)(struct amdgpu_ring *ring,
struct amdgpu_semaphore *semaphore,
bool emit_wait);
void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vm_id, void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vm_id,
uint64_t pd_addr); uint64_t pd_addr);
void (*emit_hdp_flush)(struct amdgpu_ring *ring); void (*emit_hdp_flush)(struct amdgpu_ring *ring);
...@@ -842,8 +837,6 @@ struct amdgpu_ring { ...@@ -842,8 +837,6 @@ struct amdgpu_ring {
bool ready; bool ready;
u32 nop; u32 nop;
u32 idx; u32 idx;
u64 last_semaphore_signal_addr;
u64 last_semaphore_wait_addr;
u32 me; u32 me;
u32 pipe; u32 pipe;
u32 queue; u32 queue;
...@@ -2226,7 +2219,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) ...@@ -2226,7 +2219,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
#define amdgpu_ring_emit_ib(r, ib) (r)->funcs->emit_ib((r), (ib)) #define amdgpu_ring_emit_ib(r, ib) (r)->funcs->emit_ib((r), (ib))
#define amdgpu_ring_emit_vm_flush(r, vmid, addr) (r)->funcs->emit_vm_flush((r), (vmid), (addr)) #define amdgpu_ring_emit_vm_flush(r, vmid, addr) (r)->funcs->emit_vm_flush((r), (vmid), (addr))
#define amdgpu_ring_emit_fence(r, addr, seq, flags) (r)->funcs->emit_fence((r), (addr), (seq), (flags)) #define amdgpu_ring_emit_fence(r, addr, seq, flags) (r)->funcs->emit_fence((r), (addr), (seq), (flags))
#define amdgpu_ring_emit_semaphore(r, semaphore, emit_wait) (r)->funcs->emit_semaphore((r), (semaphore), (emit_wait))
#define amdgpu_ring_emit_gds_switch(r, v, db, ds, wb, ws, ab, as) (r)->funcs->emit_gds_switch((r), (v), (db), (ds), (wb), (ws), (ab), (as)) #define amdgpu_ring_emit_gds_switch(r, v, db, ds, wb, ws, ab, as) (r)->funcs->emit_gds_switch((r), (v), (db), (ds), (wb), (ws), (ab), (as))
#define amdgpu_ring_emit_hdp_flush(r) (r)->funcs->emit_hdp_flush((r)) #define amdgpu_ring_emit_hdp_flush(r) (r)->funcs->emit_hdp_flush((r))
#define amdgpu_ih_get_wptr(adev) (adev)->irq.ih_funcs->get_wptr((adev)) #define amdgpu_ih_get_wptr(adev) (adev)->irq.ih_funcs->get_wptr((adev))
......
...@@ -491,10 +491,6 @@ static int amdgpu_debugfs_ring_info(struct seq_file *m, void *data) ...@@ -491,10 +491,6 @@ static int amdgpu_debugfs_ring_info(struct seq_file *m, void *data)
seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n",
ring->wptr, ring->wptr); ring->wptr, ring->wptr);
seq_printf(m, "last semaphore signal addr : 0x%016llx\n",
ring->last_semaphore_signal_addr);
seq_printf(m, "last semaphore wait addr : 0x%016llx\n",
ring->last_semaphore_wait_addr);
seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
seq_printf(m, "%u dwords in ring\n", count); seq_printf(m, "%u dwords in ring\n", count);
......
...@@ -1273,7 +1273,6 @@ static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = { ...@@ -1273,7 +1273,6 @@ static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = cik_sdma_ring_emit_ib, .emit_ib = cik_sdma_ring_emit_ib,
.emit_fence = cik_sdma_ring_emit_fence, .emit_fence = cik_sdma_ring_emit_fence,
.emit_semaphore = NULL,
.emit_vm_flush = cik_sdma_ring_emit_vm_flush, .emit_vm_flush = cik_sdma_ring_emit_vm_flush,
.emit_hdp_flush = cik_sdma_ring_emit_hdp_flush, .emit_hdp_flush = cik_sdma_ring_emit_hdp_flush,
.test_ring = cik_sdma_ring_test_ring, .test_ring = cik_sdma_ring_test_ring,
......
...@@ -5537,7 +5537,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = { ...@@ -5537,7 +5537,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = gfx_v7_0_ring_emit_ib_gfx, .emit_ib = gfx_v7_0_ring_emit_ib_gfx,
.emit_fence = gfx_v7_0_ring_emit_fence_gfx, .emit_fence = gfx_v7_0_ring_emit_fence_gfx,
.emit_semaphore = NULL,
.emit_vm_flush = gfx_v7_0_ring_emit_vm_flush, .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush,
.emit_gds_switch = gfx_v7_0_ring_emit_gds_switch, .emit_gds_switch = gfx_v7_0_ring_emit_gds_switch,
.emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush, .emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush,
...@@ -5553,7 +5552,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = { ...@@ -5553,7 +5552,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = gfx_v7_0_ring_emit_ib_compute, .emit_ib = gfx_v7_0_ring_emit_ib_compute,
.emit_fence = gfx_v7_0_ring_emit_fence_compute, .emit_fence = gfx_v7_0_ring_emit_fence_compute,
.emit_semaphore = NULL,
.emit_vm_flush = gfx_v7_0_ring_emit_vm_flush, .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush,
.emit_gds_switch = gfx_v7_0_ring_emit_gds_switch, .emit_gds_switch = gfx_v7_0_ring_emit_gds_switch,
.emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush, .emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush,
......
...@@ -5107,7 +5107,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = { ...@@ -5107,7 +5107,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = gfx_v8_0_ring_emit_ib_gfx, .emit_ib = gfx_v8_0_ring_emit_ib_gfx,
.emit_fence = gfx_v8_0_ring_emit_fence_gfx, .emit_fence = gfx_v8_0_ring_emit_fence_gfx,
.emit_semaphore = NULL,
.emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush,
.emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch,
.emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush,
...@@ -5123,7 +5122,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { ...@@ -5123,7 +5122,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = gfx_v8_0_ring_emit_ib_compute, .emit_ib = gfx_v8_0_ring_emit_ib_compute,
.emit_fence = gfx_v8_0_ring_emit_fence_compute, .emit_fence = gfx_v8_0_ring_emit_fence_compute,
.emit_semaphore = NULL,
.emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush,
.emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch,
.emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush,
......
...@@ -1277,7 +1277,6 @@ static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = { ...@@ -1277,7 +1277,6 @@ static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = sdma_v2_4_ring_emit_ib, .emit_ib = sdma_v2_4_ring_emit_ib,
.emit_fence = sdma_v2_4_ring_emit_fence, .emit_fence = sdma_v2_4_ring_emit_fence,
.emit_semaphore = NULL,
.emit_vm_flush = sdma_v2_4_ring_emit_vm_flush, .emit_vm_flush = sdma_v2_4_ring_emit_vm_flush,
.emit_hdp_flush = sdma_v2_4_ring_emit_hdp_flush, .emit_hdp_flush = sdma_v2_4_ring_emit_hdp_flush,
.test_ring = sdma_v2_4_ring_test_ring, .test_ring = sdma_v2_4_ring_test_ring,
......
...@@ -1544,7 +1544,6 @@ static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = { ...@@ -1544,7 +1544,6 @@ static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = sdma_v3_0_ring_emit_ib, .emit_ib = sdma_v3_0_ring_emit_ib,
.emit_fence = sdma_v3_0_ring_emit_fence, .emit_fence = sdma_v3_0_ring_emit_fence,
.emit_semaphore = NULL,
.emit_vm_flush = sdma_v3_0_ring_emit_vm_flush, .emit_vm_flush = sdma_v3_0_ring_emit_vm_flush,
.emit_hdp_flush = sdma_v3_0_ring_emit_hdp_flush, .emit_hdp_flush = sdma_v3_0_ring_emit_hdp_flush,
.test_ring = sdma_v3_0_ring_test_ring, .test_ring = sdma_v3_0_ring_test_ring,
......
...@@ -855,7 +855,6 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = { ...@@ -855,7 +855,6 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
.parse_cs = amdgpu_uvd_ring_parse_cs, .parse_cs = amdgpu_uvd_ring_parse_cs,
.emit_ib = uvd_v4_2_ring_emit_ib, .emit_ib = uvd_v4_2_ring_emit_ib,
.emit_fence = uvd_v4_2_ring_emit_fence, .emit_fence = uvd_v4_2_ring_emit_fence,
.emit_semaphore = NULL,
.test_ring = uvd_v4_2_ring_test_ring, .test_ring = uvd_v4_2_ring_test_ring,
.test_ib = uvd_v4_2_ring_test_ib, .test_ib = uvd_v4_2_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
......
...@@ -794,7 +794,6 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = { ...@@ -794,7 +794,6 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
.parse_cs = amdgpu_uvd_ring_parse_cs, .parse_cs = amdgpu_uvd_ring_parse_cs,
.emit_ib = uvd_v5_0_ring_emit_ib, .emit_ib = uvd_v5_0_ring_emit_ib,
.emit_fence = uvd_v5_0_ring_emit_fence, .emit_fence = uvd_v5_0_ring_emit_fence,
.emit_semaphore = NULL,
.test_ring = uvd_v5_0_ring_test_ring, .test_ring = uvd_v5_0_ring_test_ring,
.test_ib = uvd_v5_0_ring_test_ib, .test_ib = uvd_v5_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
......
...@@ -1035,7 +1035,6 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_funcs = { ...@@ -1035,7 +1035,6 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_funcs = {
.parse_cs = amdgpu_uvd_ring_parse_cs, .parse_cs = amdgpu_uvd_ring_parse_cs,
.emit_ib = uvd_v6_0_ring_emit_ib, .emit_ib = uvd_v6_0_ring_emit_ib,
.emit_fence = uvd_v6_0_ring_emit_fence, .emit_fence = uvd_v6_0_ring_emit_fence,
.emit_semaphore = NULL,
.test_ring = uvd_v6_0_ring_test_ring, .test_ring = uvd_v6_0_ring_test_ring,
.test_ib = uvd_v6_0_ring_test_ib, .test_ib = uvd_v6_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
......
...@@ -639,7 +639,6 @@ static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = { ...@@ -639,7 +639,6 @@ static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = {
.parse_cs = amdgpu_vce_ring_parse_cs, .parse_cs = amdgpu_vce_ring_parse_cs,
.emit_ib = amdgpu_vce_ring_emit_ib, .emit_ib = amdgpu_vce_ring_emit_ib,
.emit_fence = amdgpu_vce_ring_emit_fence, .emit_fence = amdgpu_vce_ring_emit_fence,
.emit_semaphore = NULL,
.test_ring = amdgpu_vce_ring_test_ring, .test_ring = amdgpu_vce_ring_test_ring,
.test_ib = amdgpu_vce_ring_test_ib, .test_ib = amdgpu_vce_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
......
...@@ -759,7 +759,6 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_funcs = { ...@@ -759,7 +759,6 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_funcs = {
.parse_cs = amdgpu_vce_ring_parse_cs, .parse_cs = amdgpu_vce_ring_parse_cs,
.emit_ib = amdgpu_vce_ring_emit_ib, .emit_ib = amdgpu_vce_ring_emit_ib,
.emit_fence = amdgpu_vce_ring_emit_fence, .emit_fence = amdgpu_vce_ring_emit_fence,
.emit_semaphore = NULL,
.test_ring = amdgpu_vce_ring_test_ring, .test_ring = amdgpu_vce_ring_test_ring,
.test_ib = amdgpu_vce_ring_test_ib, .test_ib = amdgpu_vce_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment