Commit eb61c2d6 authored by Alexander Lobakin's avatar Alexander Lobakin Committed by David S. Miller

qed: suppress false-positives interrupt error messages on HW init

It was found that qed_pglueb_rbc_attn_handler() can produce a lot of
false-positive error detections on driver load/reload (especially after
crashes/recoveries) and spam the kernel log:

[    4.958275] [qed_pglueb_rbc_attn_handler:324()]ICPL error - 00d00ff0
[ 2079.146764] [qed_pglueb_rbc_attn_handler:324()]ICPL error - 00d80ff0
[ 2116.374631] [qed_pglueb_rbc_attn_handler:324()]ICPL error - 00d80ff0
[ 2135.250564] [qed_pglueb_rbc_attn_handler:324()]ICPL error - 00d80ff0
[...]

Reduce the logging level of two false-positive prone error messages from
notice to verbose on initialization (only) to not mix it with real error
attentions while debugging.

Fixes: 666db486 ("qed: Revise load sequence to avoid PCI errors")
Signed-off-by: default avatarAlexander Lobakin <alobakin@marvell.com>
Signed-off-by: default avatarIgor Russkikh <irusskikh@marvell.com>
Signed-off-by: default avatarMichal Kalderon <michal.kalderon@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1ea99903
...@@ -3102,7 +3102,7 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) ...@@ -3102,7 +3102,7 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params)
} }
/* Log and clear previous pglue_b errors if such exist */ /* Log and clear previous pglue_b errors if such exist */
qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt); qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt, true);
/* Enable the PF's internal FID_enable in the PXP */ /* Enable the PF's internal FID_enable in the PXP */
rc = qed_pglueb_set_pfid_enable(p_hwfn, p_hwfn->p_main_ptt, rc = qed_pglueb_set_pfid_enable(p_hwfn, p_hwfn->p_main_ptt,
......
...@@ -257,9 +257,10 @@ static int qed_grc_attn_cb(struct qed_hwfn *p_hwfn) ...@@ -257,9 +257,10 @@ static int qed_grc_attn_cb(struct qed_hwfn *p_hwfn)
#define PGLUE_ATTENTION_ZLR_VALID (1 << 25) #define PGLUE_ATTENTION_ZLR_VALID (1 << 25)
#define PGLUE_ATTENTION_ILT_VALID (1 << 23) #define PGLUE_ATTENTION_ILT_VALID (1 << 23)
int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
struct qed_ptt *p_ptt) bool hw_init)
{ {
char msg[256];
u32 tmp; u32 tmp;
tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS2); tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS2);
...@@ -273,22 +274,23 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, ...@@ -273,22 +274,23 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,
details = qed_rd(p_hwfn, p_ptt, details = qed_rd(p_hwfn, p_ptt,
PGLUE_B_REG_TX_ERR_WR_DETAILS); PGLUE_B_REG_TX_ERR_WR_DETAILS);
DP_NOTICE(p_hwfn, snprintf(msg, sizeof(msg),
"Illegal write by chip to [%08x:%08x] blocked.\n" "Illegal write by chip to [%08x:%08x] blocked.\n"
"Details: %08x [PFID %02x, VFID %02x, VF_VALID %02x]\n" "Details: %08x [PFID %02x, VFID %02x, VF_VALID %02x]\n"
"Details2 %08x [Was_error %02x BME deassert %02x FID_enable deassert %02x]\n", "Details2 %08x [Was_error %02x BME deassert %02x FID_enable deassert %02x]",
addr_hi, addr_lo, details, addr_hi, addr_lo, details,
(u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_PFID), (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_PFID),
(u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VFID), (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VFID),
GET_FIELD(details, !!GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VF_VALID),
PGLUE_ATTENTION_DETAILS_VF_VALID) ? 1 : 0, tmp,
tmp, !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_WAS_ERR),
GET_FIELD(tmp, !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_BME),
PGLUE_ATTENTION_DETAILS2_WAS_ERR) ? 1 : 0, !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_FID_EN));
GET_FIELD(tmp,
PGLUE_ATTENTION_DETAILS2_BME) ? 1 : 0, if (hw_init)
GET_FIELD(tmp, DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg);
PGLUE_ATTENTION_DETAILS2_FID_EN) ? 1 : 0); else
DP_NOTICE(p_hwfn, "%s\n", msg);
} }
tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_RD_DETAILS2); tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_RD_DETAILS2);
...@@ -321,8 +323,14 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, ...@@ -321,8 +323,14 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,
} }
tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL); tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL);
if (tmp & PGLUE_ATTENTION_ICPL_VALID) if (tmp & PGLUE_ATTENTION_ICPL_VALID) {
DP_NOTICE(p_hwfn, "ICPL error - %08x\n", tmp); snprintf(msg, sizeof(msg), "ICPL error - %08x", tmp);
if (hw_init)
DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg);
else
DP_NOTICE(p_hwfn, "%s\n", msg);
}
tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_ZLR_ERR_DETAILS); tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_ZLR_ERR_DETAILS);
if (tmp & PGLUE_ATTENTION_ZLR_VALID) { if (tmp & PGLUE_ATTENTION_ZLR_VALID) {
...@@ -361,7 +369,7 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, ...@@ -361,7 +369,7 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,
static int qed_pglueb_rbc_attn_cb(struct qed_hwfn *p_hwfn) static int qed_pglueb_rbc_attn_cb(struct qed_hwfn *p_hwfn)
{ {
return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt); return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt, false);
} }
static int qed_fw_assertion(struct qed_hwfn *p_hwfn) static int qed_fw_assertion(struct qed_hwfn *p_hwfn)
......
...@@ -442,7 +442,7 @@ int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, ...@@ -442,7 +442,7 @@ int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
#define QED_MAPPING_MEMORY_SIZE(dev) (NUM_OF_SBS(dev)) #define QED_MAPPING_MEMORY_SIZE(dev) (NUM_OF_SBS(dev))
int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
struct qed_ptt *p_ptt); bool hw_init);
#endif #endif
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