Commit ebcfd1a5 authored by Jesse Barnes's avatar Jesse Barnes Committed by David Mosberger

[PATCH] ia64: Don't assume iosapic interrupt controllers

Some ia64 machines don't use an iosapic interrupt controller (a
flagrant violation of the DIG64 spec), so don't assume it's there in
mca.c.  Platforms that provide a ACPI_INTERRUPT_CPEI vector are
responsible for registering its interrupt controller type in platform
specific code, iosapic.c:iosapic_register_platform_intr() does this
for platforms with an iosapic where the CPEI vector is listed in the
ACPI namespace, and on sn2, all external interrupts are assigned the
irq_type_sn type, so this change of assumption should be safe.
parent b68fd6ee
...@@ -103,8 +103,6 @@ extern void ia64_slave_init_handler (void); ...@@ -103,8 +103,6 @@ extern void ia64_slave_init_handler (void);
static ia64_mc_info_t ia64_mc_info; static ia64_mc_info_t ia64_mc_info;
extern struct hw_interrupt_type irq_type_iosapic_level;
struct ia64_mca_tlb_info ia64_mca_tlb_list[NR_CPUS]; struct ia64_mca_tlb_info ia64_mca_tlb_list[NR_CPUS];
#define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */ #define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
...@@ -1253,7 +1251,6 @@ ia64_mca_init(void) ...@@ -1253,7 +1251,6 @@ ia64_mca_init(void)
if (irq_to_vector(irq) == cpev) { if (irq_to_vector(irq) == cpev) {
desc = irq_descp(irq); desc = irq_descp(irq);
desc->status |= IRQ_PER_CPU; desc->status |= IRQ_PER_CPU;
desc->handler = &irq_type_iosapic_level;
setup_irq(irq, &mca_cpe_irqaction); setup_irq(irq, &mca_cpe_irqaction);
} }
ia64_mca_register_cpev(cpev); ia64_mca_register_cpev(cpev);
......
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