Commit ec5d7657 authored by Trent Piepho's avatar Trent Piepho Committed by Kumar Gala

powerpc: Repair device bindings documentation

Commit d0fc2eaa "powerpc/fsl: Refactor
device bindings" split out a number of device bindings from
booting-without-of.txt into separate files.  Having them all in one file
was a frequent source of merge conflicts.

However, in the next merge, 49997d75, there
was another conflict.  Some of the bindings removed from
booting-without-of.txt were mistakenly added back in and the copies in
dts-bindings were kept as well.

This patch re-removes "Freescale Display Interface" and "Freescale on board
FPGA" and fixes the table of contents.
Signed-off-by: default avatarTrent Piepho <tpiepho@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent ea37194d
...@@ -41,25 +41,14 @@ Table of Contents ...@@ -41,25 +41,14 @@ Table of Contents
VI - System-on-a-chip devices and nodes VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC 1) Defining child nodes of an SOC
2) Representing devices without a current OF specification 2) Representing devices without a current OF specification
a) MDIO IO device a) PHY nodes
b) Gianfar-compatible ethernet nodes b) Interrupt controllers
c) PHY nodes c) CFI or JEDEC memory-mapped NOR flash
d) Interrupt controllers d) 4xx/Axon EMAC ethernet nodes
e) I2C e) Xilinx IP cores
f) Freescale SOC USB controllers f) USB EHCI controllers
g) Freescale SOC SEC Security Engines g) MDIO on GPIOs
h) Board Control and Status (BCSR) h) SPI busses
i) Freescale QUICC Engine module (QE)
j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
l) Freescale Communications Processor Module
m) Chipselect/Local Bus
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
q) USB EHCI controllers
r) MDIO on GPIOs
s) SPI busses
VII - Marvell Discovery mv64[345]6x System Controller chips VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node 1) The /system-controller node
...@@ -1830,41 +1819,7 @@ platforms are moved over to use the flattened-device-tree model. ...@@ -1830,41 +1819,7 @@ platforms are moved over to use the flattened-device-tree model.
big-endian; big-endian;
}; };
r) Freescale Display Interface Unit g) MDIO on GPIOs
The Freescale DIU is a LCD controller, with proper hardware, it can also
drive DVI monitors.
Required properties:
- compatible : should be "fsl-diu".
- reg : should contain at least address and length of the DIU register
set.
- Interrupts : one DIU interrupt should be describe here.
Example (MPC8610HPCD)
display@2c000 {
compatible = "fsl,diu";
reg = <0x2c000 100>;
interrupts = <72 2>;
interrupt-parent = <&mpic>;
};
s) Freescale on board FPGA
This is the memory-mapped registers for on board FPGA.
Required properities:
- compatible : should be "fsl,fpga-pixis".
- reg : should contain the address and the lenght of the FPPGA register
set.
Example (MPC8610HPCD)
board-control@e8000000 {
compatible = "fsl,fpga-pixis";
reg = <0xe8000000 32>;
};
r) MDIO on GPIOs
Currently defined compatibles: Currently defined compatibles:
- virtual,gpio-mdio - virtual,gpio-mdio
...@@ -1884,7 +1839,7 @@ platforms are moved over to use the flattened-device-tree model. ...@@ -1884,7 +1839,7 @@ platforms are moved over to use the flattened-device-tree model.
&qe_pio_c 6>; &qe_pio_c 6>;
}; };
s) SPI (Serial Peripheral Interface) busses h) SPI (Serial Peripheral Interface) busses
SPI busses can be described with a node for the SPI master device SPI busses can be described with a node for the SPI master device
and a set of child nodes for each SPI slave on the bus. For this and a set of child nodes for each SPI slave on the bus. For this
......
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