Commit eddce368 authored by Paul Mackerras's avatar Paul Mackerras

Merge branch 'next' of master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into next

parents b53c7583 cd85400a
...@@ -269,7 +269,8 @@ PCI0: pci@ec000000 { ...@@ -269,7 +269,8 @@ PCI0: pci@ec000000 {
* later cannot be changed. Chip supports a second * later cannot be changed. Chip supports a second
* IO range but we don't use it for now * IO range but we don't use it for now
*/ */
ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000
0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
......
...@@ -40,6 +40,7 @@ cpu@0 { ...@@ -40,6 +40,7 @@ cpu@0 {
d-cache-size = <32768>; d-cache-size = <32768>;
dcr-controller; dcr-controller;
dcr-access-method = "native"; dcr-access-method = "native";
next-level-cache = <&L2C0>;
}; };
}; };
...@@ -104,6 +105,16 @@ CPR0: cpr { ...@@ -104,6 +105,16 @@ CPR0: cpr {
dcr-reg = <0x00c 0x002>; dcr-reg = <0x00c 0x002>;
}; };
L2C0: l2c {
compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0x030 0x008>; /* L2 cache DCR's */
cache-line-size = <32>; /* 32 bytes */
cache-size = <262144>; /* L2, 256K */
interrupt-parent = <&UIC1>;
interrupts = <11 1>;
};
plb { plb {
compatible = "ibm,plb-460ex", "ibm,plb4"; compatible = "ibm,plb-460ex", "ibm,plb4";
#address-cells = <2>; #address-cells = <2>;
...@@ -343,6 +354,7 @@ PCIX0: pci@c0ec00000 { ...@@ -343,6 +354,7 @@ PCIX0: pci@c0ec00000 {
* later cannot be changed * later cannot be changed
*/ */
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
...@@ -373,6 +385,7 @@ PCIE0: pciex@d00000000 { ...@@ -373,6 +385,7 @@ PCIE0: pciex@d00000000 {
* later cannot be changed * later cannot be changed
*/ */
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
...@@ -414,6 +427,7 @@ PCIE1: pciex@d20000000 { ...@@ -414,6 +427,7 @@ PCIE1: pciex@d20000000 {
* later cannot be changed * later cannot be changed
*/ */
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
......
...@@ -267,7 +267,7 @@ CONFIG_PCI_SYSCALL=y ...@@ -267,7 +267,7 @@ CONFIG_PCI_SYSCALL=y
# CONFIG_PCIEPORTBUS is not set # CONFIG_PCIEPORTBUS is not set
CONFIG_ARCH_SUPPORTS_MSI=y CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_MSI is not set # CONFIG_PCI_MSI is not set
CONFIG_PCI_LEGACY=y # CONFIG_PCI_LEGACY is not set
# CONFIG_PCI_DEBUG is not set # CONFIG_PCI_DEBUG is not set
# CONFIG_PCCARD is not set # CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI is not set
...@@ -354,7 +354,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y ...@@ -354,7 +354,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IP_SCTP is not set # CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set # CONFIG_TIPC is not set
# CONFIG_ATM is not set # CONFIG_ATM is not set
# CONFIG_BRIDGE is not set CONFIG_BRIDGE=m
# CONFIG_NET_DSA is not set # CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set # CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set # CONFIG_DECNET is not set
...@@ -579,7 +579,7 @@ CONFIG_NETDEVICES=y ...@@ -579,7 +579,7 @@ CONFIG_NETDEVICES=y
# CONFIG_BONDING is not set # CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set # CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set # CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set CONFIG_TUN=m
# CONFIG_VETH is not set # CONFIG_VETH is not set
# CONFIG_ARCNET is not set # CONFIG_ARCNET is not set
# CONFIG_PHYLIB is not set # CONFIG_PHYLIB is not set
...@@ -1001,11 +1001,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y ...@@ -1001,11 +1001,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_TMC is not set # CONFIG_USB_TMC is not set
# #
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
# #
# #
# may also be needed; see USB_STORAGE Help for more information # see USB_STORAGE Help for more information
# #
CONFIG_USB_STORAGE=m CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DEBUG is not set
...@@ -1418,6 +1418,6 @@ CONFIG_CRYPTO_LZO=m ...@@ -1418,6 +1418,6 @@ CONFIG_CRYPTO_LZO=m
# CONFIG_PPC_CLOCK is not set # CONFIG_PPC_CLOCK is not set
CONFIG_VIRTUALIZATION=y CONFIG_VIRTUALIZATION=y
CONFIG_KVM=y CONFIG_KVM=y
CONFIG_KVM_BOOKE_HOST=y CONFIG_KVM_440=y
# CONFIG_VIRTIO_PCI is not set # CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_BALLOON is not set # CONFIG_VIRTIO_BALLOON is not set
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment