Commit ef391543 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_stc.h: tidy up the windowed_regs_67xx_61xx

Rename the CamelCase. For aesthetics, convert the enum into defines.
Use the BIT() macro to define the bits.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 94f0cbb9
...@@ -1091,7 +1091,7 @@ static int ni_ao_prep_fifo(struct comedi_device *dev, ...@@ -1091,7 +1091,7 @@ static int ni_ao_prep_fifo(struct comedi_device *dev,
/* reset fifo */ /* reset fifo */
ni_stc_writew(dev, 1, NISTC_DAC_FIFO_CLR_REG); ni_stc_writew(dev, 1, NISTC_DAC_FIFO_CLR_REG);
if (devpriv->is_6xxx) if (devpriv->is_6xxx)
ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x); ni_ao_win_outl(dev, 0x6, NI611X_AO_FIFO_OFFSET_LOAD_REG);
/* load some data */ /* load some data */
nbytes = comedi_buf_read_n_available(s); nbytes = comedi_buf_read_n_available(s);
...@@ -2736,9 +2736,9 @@ static int ni_ao_insn_write(struct comedi_device *dev, ...@@ -2736,9 +2736,9 @@ static int ni_ao_insn_write(struct comedi_device *dev,
int i; int i;
if (devpriv->is_6xxx) { if (devpriv->is_6xxx) {
ni_ao_win_outw(dev, 1 << chan, AO_Immediate_671x); ni_ao_win_outw(dev, 1 << chan, NI671X_AO_IMMEDIATE_REG);
reg = DACx_Direct_Data_671x(chan); reg = NI671X_DAC_DIRECT_DATA_REG(chan);
} else if (devpriv->is_m_series) { } else if (devpriv->is_m_series) {
reg = NI_M_DAC_DIRECT_DATA_REG(chan); reg = NI_M_DAC_DIRECT_DATA_REG(chan);
} else { } else {
...@@ -2838,7 +2838,7 @@ static int ni_ao_inttrig(struct comedi_device *dev, ...@@ -2838,7 +2838,7 @@ static int ni_ao_inttrig(struct comedi_device *dev,
#ifdef PCIDMA #ifdef PCIDMA
ni_stc_writew(dev, 1, NISTC_DAC_FIFO_CLR_REG); ni_stc_writew(dev, 1, NISTC_DAC_FIFO_CLR_REG);
if (devpriv->is_6xxx) if (devpriv->is_6xxx)
ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x); ni_ao_win_outl(dev, 0x6, NI611X_AO_FIFO_OFFSET_LOAD_REG);
ret = ni_ao_setup_MITE_dma(dev); ret = ni_ao_setup_MITE_dma(dev);
if (ret) if (ret)
return ret; return ret;
...@@ -2910,7 +2910,8 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ...@@ -2910,7 +2910,8 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
ni_stc_writew(dev, NISTC_AO_CMD1_DISARM, NISTC_AO_CMD1_REG); ni_stc_writew(dev, NISTC_AO_CMD1_DISARM, NISTC_AO_CMD1_REG);
if (devpriv->is_6xxx) { if (devpriv->is_6xxx) {
ni_ao_win_outw(dev, CLEAR_WG, AO_Misc_611x); ni_ao_win_outw(dev, NI611X_AO_MISC_CLEAR_WG,
NI611X_AO_MISC_REG);
bits = 0; bits = 0;
for (i = 0; i < cmd->chanlist_len; i++) { for (i = 0; i < cmd->chanlist_len; i++) {
...@@ -2918,9 +2919,9 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ...@@ -2918,9 +2919,9 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
chan = CR_CHAN(cmd->chanlist[i]); chan = CR_CHAN(cmd->chanlist[i]);
bits |= 1 << chan; bits |= 1 << chan;
ni_ao_win_outw(dev, chan, AO_Waveform_Generation_611x); ni_ao_win_outw(dev, chan, NI611X_AO_WAVEFORM_GEN_REG);
} }
ni_ao_win_outw(dev, bits, AO_Timed_611x); ni_ao_win_outw(dev, bits, NI611X_AO_TIMED_REG);
} }
ni_ao_config_chanlist(dev, s, cmd->chanlist, cmd->chanlist_len, 1); ni_ao_config_chanlist(dev, s, cmd->chanlist, cmd->chanlist_len, 1);
...@@ -3227,8 +3228,9 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s) ...@@ -3227,8 +3228,9 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
for (i = 0; i < s->n_chan; ++i) for (i = 0; i < s->n_chan; ++i)
immediate_bits |= 1 << i; immediate_bits |= 1 << i;
ni_ao_win_outw(dev, immediate_bits, AO_Immediate_671x); ni_ao_win_outw(dev, immediate_bits, NI671X_AO_IMMEDIATE_REG);
ni_ao_win_outw(dev, CLEAR_WG, AO_Misc_611x); ni_ao_win_outw(dev, NI611X_AO_MISC_CLEAR_WG,
NI611X_AO_MISC_REG);
} }
ni_stc_writew(dev, NISTC_RESET_AO_CFG_END, NISTC_RESET_REG); ni_stc_writew(dev, NISTC_RESET_AO_CFG_END, NISTC_RESET_REG);
...@@ -3708,9 +3710,9 @@ static void init_ao_67xx(struct comedi_device *dev, struct comedi_subdevice *s) ...@@ -3708,9 +3710,9 @@ static void init_ao_67xx(struct comedi_device *dev, struct comedi_subdevice *s)
for (i = 0; i < s->n_chan; i++) { for (i = 0; i < s->n_chan; i++) {
ni_ao_win_outw(dev, NI_E_AO_DACSEL(i) | 0x0, ni_ao_win_outw(dev, NI_E_AO_DACSEL(i) | 0x0,
AO_Configuration_2_67xx); NI67XX_AO_CFG2_REG);
} }
ni_ao_win_outw(dev, 0x0, AO_Later_Single_Point_Updates); ni_ao_win_outw(dev, 0x0, NI67XX_AO_SP_UPDATES_REG);
} }
static const struct mio_regmap ni_gpct_to_stc_regmap[] = { static const struct mio_regmap ni_gpct_to_stc_regmap[] = {
...@@ -4472,8 +4474,8 @@ static int cs5529_wait_for_idle(struct comedi_device *dev) ...@@ -4472,8 +4474,8 @@ static int cs5529_wait_for_idle(struct comedi_device *dev)
int i; int i;
for (i = 0; i < timeout; i++) { for (i = 0; i < timeout; i++) {
status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx); status = ni_ao_win_inw(dev, NI67XX_CAL_STATUS_REG);
if ((status & CSS_ADC_BUSY) == 0) if ((status & NI67XX_CAL_STATUS_BUSY) == 0)
break; break;
set_current_state(TASK_INTERRUPTIBLE); set_current_state(TASK_INTERRUPTIBLE);
if (schedule_timeout(1)) if (schedule_timeout(1))
...@@ -4491,13 +4493,14 @@ static void cs5529_command(struct comedi_device *dev, unsigned short value) ...@@ -4491,13 +4493,14 @@ static void cs5529_command(struct comedi_device *dev, unsigned short value)
static const int timeout = 100; static const int timeout = 100;
int i; int i;
ni_ao_win_outw(dev, value, CAL_ADC_Command_67xx); ni_ao_win_outw(dev, value, NI67XX_CAL_CMD_REG);
/* give time for command to start being serially clocked into cs5529. /* give time for command to start being serially clocked into cs5529.
* this insures that the CSS_ADC_BUSY bit will get properly * this insures that the NI67XX_CAL_STATUS_BUSY bit will get properly
* set before we exit this function. * set before we exit this function.
*/ */
for (i = 0; i < timeout; i++) { for (i = 0; i < timeout; i++) {
if ((ni_ao_win_inw(dev, CAL_ADC_Status_67xx) & CSS_ADC_BUSY)) if (ni_ao_win_inw(dev, NI67XX_CAL_STATUS_REG) &
NI67XX_CAL_STATUS_BUSY)
break; break;
udelay(1); udelay(1);
} }
...@@ -4519,18 +4522,18 @@ static int cs5529_do_conversion(struct comedi_device *dev, ...@@ -4519,18 +4522,18 @@ static int cs5529_do_conversion(struct comedi_device *dev,
"timeout or signal in cs5529_do_conversion()\n"); "timeout or signal in cs5529_do_conversion()\n");
return -ETIME; return -ETIME;
} }
status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx); status = ni_ao_win_inw(dev, NI67XX_CAL_STATUS_REG);
if (status & CSS_OSC_DETECT) { if (status & NI67XX_CAL_STATUS_OSC_DETECT) {
dev_err(dev->class_dev, dev_err(dev->class_dev,
"cs5529 conversion error, status CSS_OSC_DETECT\n"); "cs5529 conversion error, status CSS_OSC_DETECT\n");
return -EIO; return -EIO;
} }
if (status & CSS_OVERRANGE) { if (status & NI67XX_CAL_STATUS_OVERRANGE) {
dev_err(dev->class_dev, dev_err(dev->class_dev,
"cs5529 conversion error, overrange (ignoring)\n"); "cs5529 conversion error, overrange (ignoring)\n");
} }
if (data) { if (data) {
*data = ni_ao_win_inw(dev, CAL_ADC_Data_67xx); *data = ni_ao_win_inw(dev, NI67XX_CAL_DATA_REG);
/* cs5529 returns 16 bit signed data in bipolar mode */ /* cs5529 returns 16 bit signed data in bipolar mode */
*data ^= (1 << 15); *data ^= (1 << 15);
} }
...@@ -4554,7 +4557,7 @@ static int cs5529_ai_insn_read(struct comedi_device *dev, ...@@ -4554,7 +4557,7 @@ static int cs5529_ai_insn_read(struct comedi_device *dev,
channel_select = INTERNAL_REF; channel_select = INTERNAL_REF;
else else
channel_select = CR_CHAN(insn->chanspec); channel_select = CR_CHAN(insn->chanspec);
ni_ao_win_outw(dev, channel_select, AO_Calibration_Channel_Select_67xx); ni_ao_win_outw(dev, channel_select, NI67XX_AO_CAL_CHAN_SEL_REG);
for (n = 0; n < insn->n; n++) { for (n = 0; n < insn->n; n++) {
retval = cs5529_do_conversion(dev, &sample); retval = cs5529_do_conversion(dev, &sample);
...@@ -4568,10 +4571,8 @@ static int cs5529_ai_insn_read(struct comedi_device *dev, ...@@ -4568,10 +4571,8 @@ static int cs5529_ai_insn_read(struct comedi_device *dev,
static void cs5529_config_write(struct comedi_device *dev, unsigned int value, static void cs5529_config_write(struct comedi_device *dev, unsigned int value,
unsigned int reg_select_bits) unsigned int reg_select_bits)
{ {
ni_ao_win_outw(dev, ((value >> 16) & 0xff), ni_ao_win_outw(dev, (value >> 16) & 0xff, NI67XX_CAL_CFG_HI_REG);
CAL_ADC_Config_Data_High_Word_67xx); ni_ao_win_outw(dev, value & 0xffff, NI67XX_CAL_CFG_LO_REG);
ni_ao_win_outw(dev, (value & 0xffff),
CAL_ADC_Config_Data_Low_Word_67xx);
reg_select_bits &= CS5529_CMD_REG_MASK; reg_select_bits &= CS5529_CMD_REG_MASK;
cs5529_command(dev, CS5529_CMD_CB | reg_select_bits); cs5529_command(dev, CS5529_CMD_CB | reg_select_bits);
if (cs5529_wait_for_idle(dev)) if (cs5529_wait_for_idle(dev))
......
...@@ -650,32 +650,27 @@ ...@@ -650,32 +650,27 @@
#define NI6143_RELEASE_DATE_REG 0x54 /* w32 */ #define NI6143_RELEASE_DATE_REG 0x54 /* w32 */
#define NI6143_RELEASE_OLDEST_DATE_REG 0x58 /* w32 */ #define NI6143_RELEASE_OLDEST_DATE_REG 0x58 /* w32 */
/* 671x, 611x registers */ /*
* 671x, 611x windowed ao registers
/* 671xi, 611x windowed ao registers */ */
enum windowed_regs_67xx_61xx { #define NI671X_DAC_DIRECT_DATA_REG(x) (0x00 + (x)) /* w16 */
AO_Immediate_671x = 0x11, /* W 16 */ #define NI611X_AO_TIMED_REG 0x10 /* w16 */
AO_Timed_611x = 0x10, /* W 16 */ #define NI671X_AO_IMMEDIATE_REG 0x11 /* w16 */
AO_FIFO_Offset_Load_611x = 0x13, /* W32 */ #define NI611X_AO_FIFO_OFFSET_LOAD_REG 0x13 /* w32 */
AO_Later_Single_Point_Updates = 0x14, /* W 16 */ #define NI67XX_AO_SP_UPDATES_REG 0x14 /* w16 */
AO_Waveform_Generation_611x = 0x15, /* W 16 */ #define NI611X_AO_WAVEFORM_GEN_REG 0x15 /* w16 */
AO_Misc_611x = 0x16, /* W 16 */ #define NI611X_AO_MISC_REG 0x16 /* w16 */
AO_Calibration_Channel_Select_67xx = 0x17, /* W 16 */ #define NI611X_AO_MISC_CLEAR_WG BIT(0)
AO_Configuration_2_67xx = 0x18, /* W 16 */ #define NI67XX_AO_CAL_CHAN_SEL_REG 0x17 /* w16 */
CAL_ADC_Command_67xx = 0x19, /* W 8 */ #define NI67XX_AO_CFG2_REG 0x18 /* w16 */
CAL_ADC_Status_67xx = 0x1a, /* R 8 */ #define NI67XX_CAL_CMD_REG 0x19 /* w16 */
CAL_ADC_Data_67xx = 0x1b, /* R 16 */ #define NI67XX_CAL_STATUS_REG 0x1a /* r8 */
CAL_ADC_Config_Data_High_Word_67xx = 0x1c, /* RW 16 */ #define NI67XX_CAL_STATUS_BUSY BIT(0)
CAL_ADC_Config_Data_Low_Word_67xx = 0x1d, /* RW 16 */ #define NI67XX_CAL_STATUS_OSC_DETECT BIT(1)
}; #define NI67XX_CAL_STATUS_OVERRANGE BIT(2)
static inline unsigned int DACx_Direct_Data_671x(int channel) #define NI67XX_CAL_DATA_REG 0x1b /* r16 */
{ #define NI67XX_CAL_CFG_HI_REG 0x1c /* rw16 */
return channel; #define NI67XX_CAL_CFG_LO_REG 0x1d /* rw16 */
}
enum AO_Misc_611x_Bits {
CLEAR_WG = 1,
};
#define CS5529_CMD_CB BIT(7) #define CS5529_CMD_CB BIT(7)
#define CS5529_CMD_SINGLE_CONV BIT(6) #define CS5529_CMD_SINGLE_CONV BIT(6)
...@@ -718,12 +713,6 @@ enum AO_Misc_611x_Bits { ...@@ -718,12 +713,6 @@ enum AO_Misc_611x_Bits {
#define CS5529_CFG_CALIB_OFFSET_SYS CS5529_CFG_CALIB(5) #define CS5529_CFG_CALIB_OFFSET_SYS CS5529_CFG_CALIB(5)
#define CS5529_CFG_CALIB_GAIN_SYS CS5529_CFG_CALIB(6) #define CS5529_CFG_CALIB_GAIN_SYS CS5529_CFG_CALIB(6)
enum cs5529_status_bits {
CSS_ADC_BUSY = 0x1,
CSS_OSC_DETECT = 0x2, /* indicates adc error */
CSS_OVERRANGE = 0x4,
};
/* /*
This is stuff unique to the NI E series drivers, This is stuff unique to the NI E series drivers,
but I thought I'd put it here anyway. but I thought I'd put it here anyway.
......
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