Commit f0a108b7 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'renesas-cleanup2-for-v3.12' of...

Merge tag 'renesas-cleanup2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas

From Simon Horman:
Second round of Renesas ARM based SoC cleanups for v3.12

* Remove mach/hardware.h which has no useful contents
* Remove ag5evm board support
* Remove kota2 board support
* Use pm-rmobile on sh7372 and r8a7740 SoCs only, it is otherwise unneeded
* Remove use of INTC header on r8a7779 and r8a7740 SoCs
* Cleanup registration of usb phy in r8a7779 SoC
* Remove '0x's from R8A7779 DTS file for r8a7779 SoC

* tag 'renesas-cleanup2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (74 commits)
  ARM: shmobile: r8a7779: Remove '0x's from R8A7779 DTS file
  ARM: shmobile: r8a7779: cleanup registration of usb phy
  ARM: shmobile: No need to use INTC header on r8a7779
  ARM: shmobile: No need to use INTC demux on r8a7740
  ARM: shmobile: Use pm-rmobile on sh7372 and r8a7740 only
  ARM: shmobile: r8a73a4: Remove ->init_machine() special case
  ARM: shmobile: Remove include <mach/hardware.h>
  ARM: shmobile: Remove Marzen use of <mach/hardware.h>
  ARM: shmobile: Remove r8a7779 use of <mach/hardware.h>
  ARM: shmobile: Remove EMEV2 use of <mach/hardware.h>
  ARM: shmobile: Remove sh7372 use of <mach/hardware.h>
  ARM: shmobile: Remove sh73a0 use of <mach/hardware.h>
  ARCH: ARM: shmobile: Remove ag5evm board support
  ARCH: ARM: shmobile: Remove kota2 board support
  leds: Remove leds-renesas-tpu driver
  ARM: shmobile: sh73a0: Remove all GPIOs
  ARM: shmobile: kota2: Use leds-pwm + pwm-rmob
  ARM: shmobile: armadillo800eva: Add backlight support
  ARM: shmobile: Setup r8a7790 arch timer based on MD pins
  ARM: shmobile: Introduce r8a7790_read_mode_pins()
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b36f4be3 98724b7e
......@@ -183,6 +183,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
emev2-kzm9d-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7740-armadillo800eva-reference.dtb \
......
/*
* Device Tree Source for the KZM9D board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "emev2.dtsi"
/ {
model = "EMEV2 KZM9D Board";
compatible = "renesas,kzm9d-reference", "renesas,emev2";
memory {
device_type = "memory";
reg = <0x40000000 0x8000000>;
};
chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
};
reg_1p8v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
lan9220@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>;
phy-mode = "mii";
interrupt-parent = <&gpio0>;
interrupts = <1 1>; /* active high */
reg-io-width = <4>;
smsc,irq-active-high;
smsc,irq-push-pull;
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
};
......@@ -21,6 +21,6 @@ memory {
};
chosen {
bootargs = "console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
};
};
......@@ -14,6 +14,14 @@ / {
compatible = "renesas,emev2";
interrupt-parent = <&gic>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -67,4 +75,55 @@ uart@e1050000 {
reg = <0xe1050000 0x38>;
interrupts = <0 11 0>;
};
gpio0: gpio@e0050000 {
compatible = "renesas,em-gio";
reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
interrupts = <0 67 0>, <0 68 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@e0050080 {
compatible = "renesas,em-gio";
reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
interrupts = <0 69 0>, <0 70 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@e0050100 {
compatible = "renesas,em-gio";
reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
interrupts = <0 71 0>, <0 72 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@e0050180 {
compatible = "renesas,em-gio";
reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
interrupts = <0 73 0>, <0 74 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@e0050200 {
compatible = "renesas,em-gio";
reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
interrupts = <0 75 0>, <0 76 0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <31>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
......@@ -50,3 +50,25 @@ ethernet@8000000 {
};
};
};
&i2c5 {
vdd_dvfs: max8973@1b {
compatible = "maxim,max8973";
reg = <0x1b>;
regulator-min-microvolt = <935000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
};
&cpu0 {
cpu0-supply = <&vdd_dvfs>;
operating-points = <
/* kHz uV */
1950000 1115000
1462500 995000
>;
voltage-tolerance = <1>; /* 1% */
};
......@@ -85,4 +85,130 @@ thermal@e61f0000 {
interrupt-parent = <&gic>;
interrupts = <0 69 4>;
};
i2c0: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 174 0x4>;
};
i2c1: i2c@e6510000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 175 0x4>;
};
i2c2: i2c@e6520000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6520000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 176 0x4>;
};
i2c3: i2c@e6530000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6530000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 177 0x4>;
};
i2c4: i2c@e6540000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6540000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 178 0x4>;
};
i2c5: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 179 0x4>;
};
i2c6: i2c@e6550000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6550000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 184 0x4>;
};
i2c7: i2c@e6560000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6560000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 185 0x4>;
};
i2c8: i2c@e6570000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
reg = <0 0xe6570000 0 0x428>;
interrupt-parent = <&gic>;
interrupts = <0 173 0x4>;
};
mmcif0: mmcif@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 0x4>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmcif@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 0x4>;
reg-io-width = <4>;
status = "disabled";
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
cap-sd-highspeed;
status = "disabled";
};
};
......@@ -65,7 +65,7 @@ irqpin0: irqpin@fe780010 {
sense-bitfield-width = <2>;
};
i2c0: i2c@0xffc70000 {
i2c0: i2c@ffc70000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
......@@ -74,7 +74,7 @@ i2c0: i2c@0xffc70000 {
interrupts = <0 79 0x4>;
};
i2c1: i2c@0xffc71000 {
i2c1: i2c@ffc71000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
......@@ -83,7 +83,7 @@ i2c1: i2c@0xffc71000 {
interrupts = <0 82 0x4>;
};
i2c2: i2c@0xffc72000 {
i2c2: i2c@ffc72000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
......@@ -92,7 +92,7 @@ i2c2: i2c@0xffc72000 {
interrupts = <0 80 0x4>;
};
i2c3: i2c@0xffc73000 {
i2c3: i2c@ffc73000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
......
......@@ -54,4 +54,58 @@ irqc0: interrupt-controller@e61c0000 {
interrupt-parent = <&gic>;
interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
};
mmcif0: mmcif@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 169 0x4>;
reg-io-width = <4>;
status = "disabled";
};
mmcif1: mmcif@ee220000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>;
interrupt-parent = <&gic>;
interrupts = <0 170 0x4>;
reg-io-width = <4>;
status = "disabled";
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
cap-sd-highspeed;
status = "disabled";
};
sdhi3: sdhi@ee160000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 168 4>;
cap-sd-highspeed;
status = "disabled";
};
};
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_EXPERT=y
CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SH73A0=y
CONFIG_MACH_AG5EVM=y
CONFIG_MEMORY_SIZE=0x10000000
CONFIG_CPU_BPREDICT_DISABLE=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_458693=y
CONFIG_NO_HZ=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=tty0 console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM=y
# CONFIG_SUSPEND is not set
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_BLK_DEV is not set
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMSC911X=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_WLAN is not set
CONFIG_INPUT_SPARSEKMAP=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=9
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_SH_MOBILE=y
# CONFIG_HWMON is not set
# CONFIG_MFD_SUPPORT is not set
CONFIG_FB=y
CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_FTRACE is not set
# CONFIG_ARM_PATCH_PHYS_VIRT is not set
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_CGROUPS=y
CONFIG_CPUSETS=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_ARCH_SH73A0=y
CONFIG_MACH_KOTA2=y
CONFIG_MEMORY_SIZE=0x1e000000
# CONFIG_SH_TIMER_TMU is not set
# CONFIG_SWP_EMULATE is not set
CONFIG_CPU_BPREDICT_DISABLE=y
CONFIG_ARM_ERRATA_460075=y
CONFIG_ARM_ERRATA_742230=y
CONFIG_ARM_ERRATA_742231=y
CONFIG_PL310_ERRATA_588369=y
CONFIG_ARM_ERRATA_720789=y
CONFIG_PL310_ERRATA_727915=y
CONFIG_ARM_ERRATA_743622=y
CONFIG_ARM_ERRATA_751472=y
CONFIG_PL310_ERRATA_753970=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_PL310_ERRATA_769419=y
CONFIG_NO_HZ=y
CONFIG_SMP=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
CONFIG_CPU_IDLE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_CFG80211=y
CONFIG_WIRELESS_EXT_SYSFS=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_BLK_DEV is not set
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_B43=y
CONFIG_B43_PHY_N=y
CONFIG_B43_DEBUG=y
CONFIG_INPUT_SPARSEKMAP=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_SH_KEYSC=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=9
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
# CONFIG_HWMON is not set
CONFIG_BCMA=y
CONFIG_BCMA_DEBUG=y
CONFIG_FB=y
CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_LCD_PLATFORM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_RENESAS_TPU=y
CONFIG_LEDS_TRIGGERS=y
# CONFIG_DNOTIFY is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
......@@ -23,9 +23,10 @@ config ARCH_R8A73A4
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select HAVE_ARM_ARCH_TIMER
select SH_CLK_CPG
select RENESAS_IRQC
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
config ARCH_R8A7740
bool "R-Mobile A1 (R8A77400)"
......@@ -59,7 +60,6 @@ config ARCH_R8A7790
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select HAVE_ARM_ARCH_TIMER
select SH_CLK_CPG
select RENESAS_IRQC
......@@ -71,13 +71,6 @@ config ARCH_EMEV2
comment "SH-Mobile Board Type"
config MACH_AG5EVM
bool "AG5EVM board"
depends on ARCH_SH73A0
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SH_LCD_MIPI_DSI
config MACH_APE6EVM
bool "APE6EVM board"
depends on ARCH_R8A73A4
......@@ -91,12 +84,6 @@ config MACH_MACKEREL
select SND_SOC_AK4642 if SND_SIMPLE_CARD
select USE_OF
config MACH_KOTA2
bool "KOTA2 board"
depends on ARCH_SH73A0
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
config MACH_ARMADILLO800EVA
bool "Armadillo-800 EVA board"
depends on ARCH_R8A7740
......@@ -156,6 +143,18 @@ config MACH_KZM9D
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
config MACH_KZM9D_REFERENCE
bool "KZM9D board - Reference Device Tree Implementation"
depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
---help---
Use reference implementation of KZM9D board support
which makes a greater use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_KZM9G
bool "KZM-A9-GT board"
depends on ARCH_SH73A0
......
......@@ -23,22 +23,18 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o
# IRQ objects
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o
# PM objects
obj-$(CONFIG_SUSPEND) += suspend.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o
obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
# Board objects
obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_KOTA2) += board-kota2.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
......@@ -46,6 +42,7 @@ obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
obj-$(CONFIG_MACH_KZM9D_REFERENCE) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
......
# per-board load address for uImage
loadaddr-y :=
loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
......
This diff is collapsed.
......@@ -20,7 +20,6 @@
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
......@@ -102,7 +101,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
};
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
.init_irq = irqchip_init,
.init_early = r8a73a4_init_delay,
.init_time = shmobile_timer_init,
.init_machine = ape6evm_add_standard_devices,
.dt_compat = ape6evm_boards_compat_dt,
......
......@@ -31,6 +31,8 @@
#include <linux/gpio_keys.h>
#include <linux/regulator/driver.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/pwm-renesas-tpu.h>
#include <linux/pwm_backlight.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
......@@ -387,7 +389,50 @@ static struct platform_device sh_eth_device = {
.num_resources = ARRAY_SIZE(sh_eth_resources),
};
/* LCDC */
/* PWM */
static struct resource pwm_resources[] = {
[0] = {
.start = 0xe6600000,
.end = 0xe66000ff,
.flags = IORESOURCE_MEM,
},
};
static struct tpu_pwm_platform_data pwm_device_data = {
.channels[2] = {
.polarity = PWM_POLARITY_INVERSED,
}
};
static struct platform_device pwm_device = {
.name = "renesas-tpu-pwm",
.id = -1,
.dev = {
.platform_data = &pwm_device_data,
},
.num_resources = ARRAY_SIZE(pwm_resources),
.resource = pwm_resources,
};
static struct pwm_lookup pwm_lookup[] = {
PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL),
};
/* LCDC and backlight */
static struct platform_pwm_backlight_data pwm_backlight_data = {
.lth_brightness = 50,
.max_brightness = 255,
.dft_brightness = 255,
.pwm_period_ns = 33333, /* 30kHz */
};
static struct platform_device pwm_backlight_device = {
.name = "pwm-backlight",
.dev = {
.platform_data = &pwm_backlight_data,
},
};
static struct fb_videomode lcdc0_mode = {
.name = "AMPIER/AM-800480",
.xres = 800,
......@@ -679,15 +724,6 @@ static struct platform_device vcc_sdhi1 = {
};
/* SDHI0 */
/*
* FIXME
*
* It use polling mode here, since
* CD (= Card Detect) pin is not connected to SDHI0_CD.
* We can use IRQ31 as card detect irq,
* but it needs chattering removal operation
*/
#define IRQ31 irq_pin(31)
static struct sh_mobile_sdhi_info sdhi0_info = {
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
......@@ -1030,6 +1066,8 @@ static struct i2c_board_info i2c2_devices[] = {
*/
static struct platform_device *eva_devices[] __initdata = {
&lcdc0_device,
&pwm_device,
&pwm_backlight_device,
&gpio_keys_device,
&sh_eth_device,
&vcc_sdhi0,
......@@ -1101,6 +1139,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
/* ST1232 */
PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
"intc_irq10", "intc"),
/* TPU0 */
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm", "pfc-r8a7740",
"tpu0_to2_1", "tpu0"),
/* USBHS */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
"intc_irq7_1", "intc"),
......@@ -1154,13 +1195,13 @@ static void __init eva_init(void)
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
r8a7740_pinmux_init();
r8a7740_meram_workaround();
/* LCDC0 */
gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
/* GETHER */
gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
......
This diff is collapsed.
/*
* kzm9d board support - Reference DT implementation
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/of_platform.h>
#include <mach/emev2.h>
#include <mach/common.h>
#include <asm/mach/arch.h>
static void __init kzm9d_add_standard_devices(void)
{
emev2_clock_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *kzm9d_boards_compat_dt[] __initdata = {
"renesas,kzm9d-reference",
NULL,
};
DT_MACHINE_START(KZM9D_DT, "kzm9d")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
.init_early = emev2_init_delay,
.init_machine = kzm9d_add_standard_devices,
.init_late = shmobile_init_late,
.dt_compat = kzm9d_boards_compat_dt,
MACHINE_END
......@@ -85,9 +85,7 @@ static const char *kzm9d_boards_compat_dt[] __initdata = {
DT_MACHINE_START(KZM9D_DT, "kzm9d")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
.init_early = emev2_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = emev2_init_irq,
.init_early = emev2_init_delay,
.init_machine = kzm9d_add_standard_devices,
.init_late = shmobile_init_late,
.dt_compat = kzm9d_boards_compat_dt,
......
......@@ -24,7 +24,6 @@
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/input.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/machine.h>
......@@ -99,7 +98,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
.map_io = sh73a0_map_io,
.init_early = sh73a0_init_delay,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = irqchip_init,
.init_machine = kzm_init,
.init_time = shmobile_timer_init,
.dt_compat = kzm9g_boards_compat_dt,
......
......@@ -22,7 +22,6 @@
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/pinctrl/machine.h>
......@@ -103,7 +102,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
};
DT_MACHINE_START(LAGER_DT, "lager")
.init_irq = irqchip_init,
.init_early = r8a7790_init_delay,
.init_time = r8a7790_timer_init,
.init_machine = lager_add_standard_devices,
.dt_compat = lager_boards_compat_dt,
......
......@@ -41,6 +41,7 @@
#include <linux/mtd/physmap.h>
#include <linux/mtd/sh_flctl.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio_backlight.h>
#include <linux/pm_clock.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
......@@ -49,7 +50,6 @@
#include <linux/tca6416_keypad.h>
#include <linux/usb/renesas_usbhs.h>
#include <linux/dma-mapping.h>
#include <video/sh_mobile_hdmi.h>
#include <video/sh_mobile_lcdc.h>
#include <media/sh_mobile_ceu.h>
......@@ -346,7 +346,7 @@ static struct platform_device meram_device = {
},
};
/* LCDC */
/* LCDC and backlight */
static struct fb_videomode mackerel_lcdc_modes[] = {
{
.name = "WVGA Panel",
......@@ -362,13 +362,6 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
},
};
static int mackerel_set_brightness(int brightness)
{
gpio_set_value(31, brightness);
return 0;
}
static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
.icb[0] = {
.meram_size = 0x40,
......@@ -393,11 +386,6 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.width = 152,
.height = 91,
},
.bl_info = {
.name = "sh_mobile_lcdc_bl",
.max_brightness = 1,
.set_brightness = mackerel_set_brightness,
},
.meram_cfg = &lcd_meram_cfg,
}
};
......@@ -425,6 +413,20 @@ static struct platform_device lcdc_device = {
},
};
static struct gpio_backlight_platform_data gpio_backlight_data = {
.fbdev = &lcdc_device.dev,
.gpio = 31,
.def_value = 1,
.name = "backlight",
};
static struct platform_device gpio_backlight_device = {
.name = "gpio-backlight",
.dev = {
.platform_data = &gpio_backlight_data,
},
};
/* HDMI */
static struct sh_mobile_hdmi_info hdmi_info = {
.flags = HDMI_SND_SRC_SPDIF,
......@@ -1231,6 +1233,7 @@ static struct platform_device *mackerel_devices[] __initdata = {
&nor_flash_device,
&smc911x_device,
&lcdc_device,
&gpio_backlight_device,
&usbhs0_device,
&usbhs1_device,
&leds_device,
......@@ -1441,9 +1444,6 @@ static void __init mackerel_init(void)
ARRAY_SIZE(mackerel_pinctrl_map));
sh7372_pinmux_init();
/* backlight, off by default */
gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* USBHS0 */
......
......@@ -29,6 +29,7 @@
#include <linux/dma-mapping.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
......@@ -37,7 +38,6 @@
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/tmio.h>
#include <mach/hardware.h>
#include <mach/r8a7779.h>
#include <mach/common.h>
#include <mach/irqs.h>
......@@ -57,7 +57,26 @@ static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
/* USB PHY */
static struct resource usb_phy_resources[] = {
[0] = {
.start = 0xffe70800,
.end = 0xffe70900 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct rcar_phy_platform_data usb_phy_platform_data;
static struct platform_device usb_phy = {
.name = "rcar_usb_phy",
.id = -1,
.dev = {
.platform_data = &usb_phy_platform_data,
},
.resource = usb_phy_resources,
.num_resources = ARRAY_SIZE(usb_phy_resources),
};
/* SMSC LAN89218 */
static struct resource smsc911x_resources[] = {
......@@ -184,6 +203,7 @@ static struct platform_device *marzen_devices[] __initdata = {
&thermal_device,
&hspi_device,
&leds_device,
&usb_phy,
};
static const struct pinctrl_map marzen_pinctrl_map[] = {
......@@ -234,7 +254,6 @@ static void __init marzen_init(void)
r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
r8a7779_add_standard_devices();
r8a7779_add_usb_phy_device(&usb_phy_platform_data);
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
}
......
......@@ -40,7 +40,6 @@
#define USIB2SCLKDIV 0x65c
#define USIB3SCLKDIV 0x660
#define STI_CLKSEL 0x688
#define SMU_GENERAL_REG0 0x7c0
/* not pretty, but hey */
static void __iomem *smu_base;
......@@ -51,11 +50,6 @@ static void emev2_smu_write(unsigned long value, int offs)
iowrite32(value, smu_base + offs);
}
void emev2_set_boot_vector(unsigned long value)
{
emev2_smu_write(value, SMU_GENERAL_REG0);
}
static struct clk_mapping smu_mapping = {
.phys = EMEV2_SMU_BASE,
.len = PAGE_SIZE,
......@@ -205,23 +199,11 @@ static struct clk_lookup lookups[] = {
void __init emev2_clock_init(void)
{
int k, ret = 0;
static int is_setup;
/* yuck, this is ugly as hell, but the non-smp case of clocks
* code is now designed to rely on ioremap() instead of static
* entity maps. in the case of smp we need access to the SMU
* register earlier than ioremap() is actually working without
* any static maps. to enable SMP in ugly but with dynamic
* mappings we have to call emev2_clock_init() from different
* places depending on UP and SMP...
*/
if (is_setup++)
return;
smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
BUG_ON(!smu_base);
/* setup STI timer to run on 37.768 kHz and deassert reset */
/* setup STI timer to run on 32.768 kHz and deassert reset */
emev2_smu_write(0, STI_CLKSEL);
emev2_smu_write(1, STI_RSTCTRL);
......
......@@ -30,10 +30,12 @@
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
#define SMSTPCR4 0xe6150140
#define SMSTPCR5 0xe6150144
#define FRQCRA 0xE6150000
#define FRQCRB 0xE6150004
#define FRQCRC 0xE61500E0
#define VCLKCR1 0xE6150008
#define VCLKCR2 0xE615000C
#define VCLKCR3 0xE615001C
......@@ -52,6 +54,7 @@
#define HSICKCR 0xE615026C
#define M4CKCR 0xE6150098
#define PLLECR 0xE61500D0
#define PLL0CR 0xE61500D8
#define PLL1CR 0xE6150028
#define PLL2CR 0xE615002C
#define PLL2SCR 0xE61501F4
......@@ -177,6 +180,7 @@ static struct sh_clk_ops pll_clk_ops = {
.mapping = &cpg_mapping, \
}
PLL_CLOCK(pll0_clk, &main_clk, pll_parent_main, 1, 20, PLL0CR, 0);
PLL_CLOCK(pll1_clk, &main_clk, pll_parent_main, 1, 7, PLL1CR, 1);
PLL_CLOCK(pll2_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2CR, 2);
PLL_CLOCK(pll2s_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2SCR, 4);
......@@ -184,6 +188,157 @@ PLL_CLOCK(pll2h_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2HCR, 5);
SH_FIXED_RATIO_CLK(pll1_div2_clk, pll1_clk, div2);
static atomic_t frqcr_lock;
/* Several clocks need to access FRQCRB, have to lock */
static bool frqcr_kick_check(struct clk *clk)
{
return !(ioread32(CPG_MAP(FRQCRB)) & BIT(31));
}
static int frqcr_kick_do(struct clk *clk)
{
int i;
/* set KICK bit in FRQCRB to update hardware setting, check success */
iowrite32(ioread32(CPG_MAP(FRQCRB)) | BIT(31), CPG_MAP(FRQCRB));
for (i = 1000; i; i--)
if (ioread32(CPG_MAP(FRQCRB)) & BIT(31))
cpu_relax();
else
return 0;
return -ETIMEDOUT;
}
static int zclk_set_rate(struct clk *clk, unsigned long rate)
{
void __iomem *frqcrc;
int ret;
unsigned long step, p_rate;
u32 val;
if (!clk->parent || !__clk_get(clk->parent))
return -ENODEV;
if (!atomic_inc_and_test(&frqcr_lock) || !frqcr_kick_check(clk)) {
ret = -EBUSY;
goto done;
}
/*
* Users are supposed to first call clk_set_rate() only with
* clk_round_rate() results. So, we don't fix wrong rates here, but
* guard against them anyway
*/
p_rate = clk_get_rate(clk->parent);
if (rate == p_rate) {
val = 0;
} else {
step = DIV_ROUND_CLOSEST(p_rate, 32);
if (rate > p_rate || rate < step) {
ret = -EINVAL;
goto done;
}
val = 32 - rate / step;
}
frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) |
(val << clk->enable_bit), frqcrc);
ret = frqcr_kick_do(clk);
done:
atomic_dec(&frqcr_lock);
__clk_put(clk->parent);
return ret;
}
static long zclk_round_rate(struct clk *clk, unsigned long rate)
{
/*
* theoretical rate = parent rate * multiplier / 32,
* where 1 <= multiplier <= 32. Therefore we should do
* multiplier = rate * 32 / parent rate
* rounded rate = parent rate * multiplier / 32.
* However, multiplication before division won't fit in 32 bits, so
* we sacrifice some precision by first dividing and then multiplying.
* To find the nearest divisor we calculate both and pick up the best
* one. This avoids 64-bit arithmetics.
*/
unsigned long step, mul_min, mul_max, rate_min, rate_max;
rate_max = clk_get_rate(clk->parent);
/* output freq <= parent */
if (rate >= rate_max)
return rate_max;
step = DIV_ROUND_CLOSEST(rate_max, 32);
/* output freq >= parent / 32 */
if (step >= rate)
return step;
mul_min = rate / step;
mul_max = DIV_ROUND_UP(rate, step);
rate_min = step * mul_min;
if (mul_max == mul_min)
return rate_min;
rate_max = step * mul_max;
if (rate_max - rate < rate - rate_min)
return rate_max;
return rate_min;
}
static unsigned long zclk_recalc(struct clk *clk)
{
void __iomem *frqcrc = FRQCRC - (u32)clk->enable_reg + clk->mapped_reg;
unsigned int max = clk->div_mask + 1;
unsigned long val = ((ioread32(frqcrc) >> clk->enable_bit) &
clk->div_mask);
return DIV_ROUND_CLOSEST(clk_get_rate(clk->parent), max) *
(max - val);
}
static struct sh_clk_ops zclk_ops = {
.recalc = zclk_recalc,
.set_rate = zclk_set_rate,
.round_rate = zclk_round_rate,
};
static struct clk z_clk = {
.parent = &pll0_clk,
.div_mask = 0x1f,
.enable_bit = 8,
/* We'll need to access FRQCRB and FRQCRC */
.enable_reg = (void __iomem *)FRQCRB,
.ops = &zclk_ops,
};
/*
* It seems only 1/2 divider is usable in manual mode. 1/2 / 2/3
* switching is only available in auto-DVFS mode
*/
SH_FIXED_RATIO_CLK(pll0_div2_clk, pll0_clk, div2);
static struct clk z2_clk = {
.parent = &pll0_div2_clk,
.div_mask = 0x1f,
.enable_bit = 0,
/* We'll need to access FRQCRB and FRQCRC */
.enable_reg = (void __iomem *)FRQCRB,
.ops = &zclk_ops,
};
static struct clk *main_clks[] = {
&extalr_clk,
&extal1_clk,
......@@ -195,22 +350,23 @@ static struct clk *main_clks[] = {
&main_div2_clk,
&fsiack_clk,
&fsibck_clk,
&pll0_clk,
&pll1_clk,
&pll1_div2_clk,
&pll2_clk,
&pll2s_clk,
&pll2h_clk,
&z_clk,
&pll0_div2_clk,
&z2_clk,
};
/* DIV4 */
static void div4_kick(struct clk *clk)
{
unsigned long value;
/* set KICK bit in FRQCRB to update hardware setting */
value = ioread32(CPG_MAP(FRQCRB));
value |= (1 << 31);
iowrite32(value, CPG_MAP(FRQCRB));
if (!WARN(!atomic_inc_and_test(&frqcr_lock), "FRQCR* lock broken!\n"))
frqcr_kick_do(clk);
atomic_dec(&frqcr_lock);
}
static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10};
......@@ -349,8 +505,10 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */
enum {
MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
MSTP522,
MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
MSTP411, MSTP410, MSTP409,
MSTP522, MSTP515,
MSTP_NR
};
......@@ -361,12 +519,22 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
[MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 0, 0), /* IIC2 */
[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
[MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
[MSTP316] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 16, 0), /* IIC6 */
[MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 17, 0), /* IIC7 */
[MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* IIC0 */
[MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
[MSTP329] = SH_CLK_MSTP32(&extalr_clk, SMSTPCR3, 29, 0), /* CMT10 */
[MSTP409] = SH_CLK_MSTP32(&main_div2_clk, SMSTPCR4, 9, 0), /* IIC5 */
[MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
[MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
[MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
[MSTP515] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR5, 15, 0), /* IIC8 */
};
static struct clk_lookup lookups[] = {
......@@ -386,6 +554,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("pll2s", &pll2s_clk),
CLKDEV_CON_ID("pll2h", &pll2h_clk),
/* CPU clock */
CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk),
/* DIV6 */
CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),
......@@ -408,6 +579,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
......@@ -418,6 +590,15 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
CLKDEV_DEV_ID("e6570000.i2c", &mstp_clks[MSTP515]),
/* for DT */
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
......@@ -429,6 +610,8 @@ void __init r8a73a4_clock_init(void)
int k, ret = 0;
u32 ckscr;
atomic_set(&frqcr_lock, -1);
reg = ioremap_nocache(CKSCR, PAGE_SIZE);
BUG_ON(!reg);
ckscr = ioread32(reg);
......
......@@ -24,6 +24,7 @@
#include <linux/clkdev.h>
#include <mach/clock.h>
#include <mach/common.h>
#include <mach/r8a7790.h>
/*
* MD EXTAL PLL0 PLL1 PLL3
......@@ -42,16 +43,15 @@
* see "p1 / 2" on R8A7790_CLOCK_ROOT() below
*/
#define MD(nr) (1 << nr)
#define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000
#define SMSTPCR1 0xe6150134
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
#define SMSTPCR5 0xe6150144
#define SMSTPCR7 0xe615014c
#define MODEMR 0xE6160060
#define SDCKCR 0xE6150074
#define SD2CKCR 0xE6150078
#define SD3CKCR 0xE615007C
......@@ -182,14 +182,19 @@ static struct clk div6_clks[DIV6_NR] = {
enum {
MSTP721, MSTP720,
MSTP717, MSTP716,
MSTP522,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
MSTP124,
MSTP_NR
};
static struct clk mstp_clks[MSTP_NR] = {
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
......@@ -203,8 +208,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
[MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */
};
static struct clk_lookup lookups[] = {
......@@ -254,6 +258,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
......@@ -266,6 +271,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
};
#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
......@@ -280,14 +286,9 @@ static struct clk_lookup lookups[] = {
void __init r8a7790_clock_init(void)
{
void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
u32 mode;
u32 mode = r8a7790_read_mode_pins();
int k, ret = 0;
BUG_ON(!modemr);
mode = ioread32(modemr);
iounmap(modemr);
switch (mode & (MD(14) | MD(13))) {
case 0:
R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
......
......@@ -555,7 +555,7 @@ enum { MSTP001,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
MSTP314, MSTP313, MSTP312, MSTP311,
MSTP303, MSTP302, MSTP301, MSTP300,
MSTP304, MSTP303, MSTP302, MSTP301, MSTP300,
MSTP411, MSTP410, MSTP403,
MSTP_NR };
......@@ -593,6 +593,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
[MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
[MSTP304] = MSTP(&main_div2_clk, SMSTPCR3, 4, 0), /* TPU0 */
[MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
[MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
[MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
......@@ -669,10 +670,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
CLKDEV_DEV_ID("renesas-tpu-pwm.3", &mstp_clks[MSTP301]), /* TPU3 */
CLKDEV_DEV_ID("renesas-tpu-pwm.4", &mstp_clks[MSTP300]), /* TPU4 */
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
......
......@@ -2,11 +2,9 @@
#define __ASM_EMEV2_H__
extern void emev2_map_io(void);
extern void emev2_init_irq(void);
extern void emev2_add_early_devices(void);
extern void emev2_init_delay(void);
extern void emev2_add_standard_devices(void);
extern void emev2_clock_init(void);
extern void emev2_set_boot_vector(unsigned long value);
#define EMEV2_GPIO_BASE 200
#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
......
#ifndef __ASM_MACH_HARDWARE_H
#define __ASM_MACH_HARDWARE_H
#endif /* __ASM_MACH_HARDWARE_H */
......@@ -4,5 +4,6 @@
void r8a73a4_add_standard_devices(void);
void r8a73a4_clock_init(void);
void r8a73a4_pinmux_init(void);
void r8a73a4_init_delay(void);
#endif /* __ASM_R8A73A4_H__ */
......@@ -42,6 +42,8 @@ enum {
SHDMA_SLAVE_FSIB_TX,
SHDMA_SLAVE_USBHS_TX,
SHDMA_SLAVE_USBHS_RX,
SHDMA_SLAVE_MMCIF_TX,
SHDMA_SLAVE_MMCIF_RX,
};
extern void r8a7740_meram_workaround(void);
......
......@@ -33,7 +33,6 @@ extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
extern void r8a7778_init_late(void);
extern void r8a7778_init_delay(void);
extern void r8a7778_init_irq(void);
extern void r8a7778_init_irq_dt(void);
extern void r8a7778_clock_init(void);
extern void r8a7778_init_irq_extpin(int irlm);
......
......@@ -4,7 +4,6 @@
#include <linux/sh_clk.h>
#include <linux/pm_domain.h>
#include <linux/sh_eth.h>
#include <linux/platform_data/usb-rcar-phy.h>
struct platform_device;
......@@ -34,7 +33,6 @@ extern void r8a7779_add_early_devices(void);
extern void r8a7779_add_standard_devices(void);
extern void r8a7779_add_standard_devices_dt(void);
extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
extern void r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
extern void r8a7779_init_late(void);
extern void r8a7779_clock_init(void);
extern void r8a7779_pinmux_init(void);
......
......@@ -4,6 +4,10 @@
void r8a7790_add_standard_devices(void);
void r8a7790_clock_init(void);
void r8a7790_pinmux_init(void);
void r8a7790_init_delay(void);
void r8a7790_timer_init(void);
#define MD(nr) BIT(nr)
u32 r8a7790_read_mode_pins(void);
#endif /* __ASM_R8A7790_H__ */
......@@ -27,7 +27,6 @@
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
#include <linux/irqchip.h>
#include <mach/common.h>
#include <mach/intc.h>
#include <mach/irqs.h>
#include <mach/r8a7779.h>
#include <asm/mach-types.h>
......
This diff is collapsed.
......@@ -18,11 +18,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_data/irq-renesas-irqc.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a73a4.h>
......@@ -169,6 +169,25 @@ static const struct resource thermal0_resources[] = {
thermal0_resources, \
ARRAY_SIZE(thermal0_resources))
static struct sh_timer_config cmt10_platform_data = {
.name = "CMT10",
.timer_bit = 0,
.clockevent_rating = 80,
};
static struct resource cmt10_resources[] = {
DEFINE_RES_MEM(0xe6130010, 0x0c),
DEFINE_RES_MEM(0xe6130000, 0x04),
DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
};
#define r8a7790_register_cmt(idx) \
platform_device_register_resndata(&platform_bus, "sh_cmt", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a73a4_add_standard_devices(void)
{
r8a73a4_register_scif(SCIFA0);
......@@ -180,22 +199,25 @@ void __init r8a73a4_add_standard_devices(void)
r8a73a4_register_irqc(0);
r8a73a4_register_irqc(1);
r8a73a4_register_thermal();
r8a7790_register_cmt(10);
}
#ifdef CONFIG_USE_OF
void __init r8a73a4_add_standard_devices_dt(void)
void __init r8a73a4_init_delay(void)
{
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
#ifndef CONFIG_ARM_ARCH_TIMER
shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
#endif
}
#ifdef CONFIG_USE_OF
static const char *r8a73a4_boards_compat_dt[] __initdata = {
"renesas,r8a73a4",
NULL,
};
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
.init_irq = irqchip_init,
.init_machine = r8a73a4_add_standard_devices_dt,
.init_early = r8a73a4_init_delay,
.init_time = shmobile_timer_init,
.dt_compat = r8a73a4_boards_compat_dt,
MACHINE_END
......
......@@ -588,6 +588,16 @@ static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
.addr = 0xfe1f0064,
.chcr = CHCR_TX(XMIT_SZ_32BIT),
.mid_rid = 0xb5,
}, {
.slave_id = SHDMA_SLAVE_MMCIF_TX,
.addr = 0xe6bd0034,
.chcr = CHCR_TX(XMIT_SZ_32BIT),
.mid_rid = 0xd1,
}, {
.slave_id = SHDMA_SLAVE_MMCIF_RX,
.addr = 0xe6bd0034,
.chcr = CHCR_RX(XMIT_SZ_32BIT),
.mid_rid = 0xd2,
},
};
......@@ -986,16 +996,22 @@ void __init r8a7740_add_early_devices(void)
#ifdef CONFIG_USE_OF
static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
{ }
};
void __init r8a7740_add_early_devices_dt(void)
{
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
early_platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
/* setup early console here as well */
shmobile_setup_console();
}
void __init r8a7740_add_standard_devices_dt(void)
{
platform_add_devices(r8a7740_devices_dt,
ARRAY_SIZE(r8a7740_devices_dt));
of_platform_populate(NULL, of_default_bus_match_table,
r8a7740_auxdata_lookup, NULL);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
void __init r8a7740_init_delay(void)
......
......@@ -53,7 +53,7 @@
.irqs = SCIx_IRQ_MUXED(irq), \
}
static struct plat_sci_port scif_platform_data[] = {
static struct plat_sci_port scif_platform_data[] __initdata = {
SCIF_INFO(0xffe40000, gic_iid(0x66)),
SCIF_INFO(0xffe41000, gic_iid(0x67)),
SCIF_INFO(0xffe42000, gic_iid(0x68)),
......@@ -63,24 +63,24 @@ static struct plat_sci_port scif_platform_data[] = {
};
/* TMU */
static struct resource sh_tmu0_resources[] = {
static struct resource sh_tmu0_resources[] __initdata = {
DEFINE_RES_MEM(0xffd80008, 12),
DEFINE_RES_IRQ(gic_iid(0x40)),
};
static struct sh_timer_config sh_tmu0_platform_data = {
static struct sh_timer_config sh_tmu0_platform_data __initdata = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
};
static struct resource sh_tmu1_resources[] = {
static struct resource sh_tmu1_resources[] __initdata = {
DEFINE_RES_MEM(0xffd80014, 12),
DEFINE_RES_IRQ(gic_iid(0x41)),
};
static struct sh_timer_config sh_tmu1_platform_data = {
static struct sh_timer_config sh_tmu1_platform_data __initdata = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
......@@ -189,7 +189,7 @@ USB_PLATFORM_INFO(ehci);
USB_PLATFORM_INFO(ohci);
/* Ether */
static struct resource ether_resources[] = {
static struct resource ether_resources[] __initdata = {
DEFINE_RES_MEM(0xfde00000, 0x400),
DEFINE_RES_IRQ(gic_iid(0x89)),
};
......@@ -203,17 +203,17 @@ void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
}
/* PFC/GPIO */
static struct resource pfc_resources[] = {
static struct resource pfc_resources[] __initdata = {
DEFINE_RES_MEM(0xfffc0000, 0x118),
};
#define R8A7778_GPIO(idx) \
static struct resource r8a7778_gpio##idx##_resources[] = { \
static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \
DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
DEFINE_RES_IRQ(gic_iid(0x87)), \
}; \
\
static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \
static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \
.gpio_base = 32 * (idx), \
.irq_base = GPIO_IRQ_BASE(idx), \
.number_of_pins = 32, \
......@@ -249,7 +249,7 @@ void __init r8a7778_pinmux_init(void)
};
/* SDHI */
static struct resource sdhi_resources[] = {
static struct resource sdhi_resources[] __initdata = {
/* SDHI0 */
DEFINE_RES_MEM(0xFFE4C000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x77)),
......@@ -365,12 +365,12 @@ void __init r8a7778_init_late(void)
platform_device_register_full(&ohci_info);
}
static struct renesas_intc_irqpin_config irqpin_platform_data = {
static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = {
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
.sense_bitfield_width = 2,
};
static struct resource irqpin_resources[] = {
static struct resource irqpin_resources[] __initdata = {
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
......@@ -408,17 +408,25 @@ void __init r8a7778_init_irq_extpin(int irlm)
&irqpin_platform_data, sizeof(irqpin_platform_data));
}
void __init r8a7778_init_delay(void)
{
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
}
#ifdef CONFIG_USE_OF
#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
#define INT2SMSKCR1 0x8228c /* 0xfe78228c */
#define INT2NTSR0 0x00018 /* 0xfe700018 */
#define INT2NTSR1 0x0002c /* 0xfe70002c */
static void __init r8a7778_init_irq_common(void)
void __init r8a7778_init_irq_dt(void)
{
void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
BUG_ON(!base);
irqchip_init();
/* route all interrupts to ARM */
__raw_writel(0x73ffffff, base + INT2NTSR0);
__raw_writel(0xffffffff, base + INT2NTSR1);
......@@ -430,43 +438,6 @@ static void __init r8a7778_init_irq_common(void)
iounmap(base);
}
void __init r8a7778_init_irq(void)
{
void __iomem *gic_dist_base;
void __iomem *gic_cpu_base;
gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE);
BUG_ON(!gic_dist_base || !gic_cpu_base);
/* use GIC to handle interrupts */
gic_init(0, 29, gic_dist_base, gic_cpu_base);
r8a7778_init_irq_common();
}
void __init r8a7778_init_delay(void)
{
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
}
#ifdef CONFIG_USE_OF
void __init r8a7778_init_irq_dt(void)
{
irqchip_init();
r8a7778_init_irq_common();
}
static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
{},
};
void __init r8a7778_add_standard_devices_dt(void)
{
of_platform_populate(NULL, of_default_bus_match_table,
r8a7778_auxdata_lookup, NULL);
}
static const char *r8a7778_compat_dt[] __initdata = {
"renesas,r8a7778",
NULL,
......@@ -475,7 +446,6 @@ static const char *r8a7778_compat_dt[] __initdata = {
DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
.init_early = r8a7778_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_machine = r8a7778_add_standard_devices_dt,
.init_time = shmobile_timer_init,
.dt_compat = r8a7778_compat_dt,
.init_late = r8a7778_init_late,
......
......@@ -29,7 +29,6 @@
#include <linux/input.h>
#include <linux/io.h>
#include <linux/serial_sci.h>
#include <linux/sh_intc.h>
#include <linux/sh_timer.h>
#include <linux/dma-mapping.h>
#include <linux/usb/otg.h>
......@@ -37,7 +36,6 @@
#include <linux/usb/ehci_pdriver.h>
#include <linux/usb/ohci_pdriver.h>
#include <linux/pm_runtime.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/r8a7779.h>
#include <mach/common.h>
......@@ -388,15 +386,6 @@ static struct platform_device sata_device = {
},
};
/* USB PHY */
static struct resource usb_phy_resources[] __initdata = {
[0] = {
.start = 0xffe70800,
.end = 0xffe70900 - 1,
.flags = IORESOURCE_MEM,
},
};
/* USB */
static struct usb_phy *phy;
......@@ -602,14 +591,6 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
pdata, sizeof(*pdata));
}
void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
{
platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
usb_phy_resources,
ARRAY_SIZE(usb_phy_resources),
pdata, sizeof(*pdata));
}
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
void __init __weak r8a7779_register_twd(void) { }
......@@ -665,10 +646,6 @@ void __init r8a7779_init_delay(void)
shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
}
static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
{},
};
void __init r8a7779_add_standard_devices_dt(void)
{
/* clocks are setup late during boot in the case of DT */
......@@ -676,8 +653,7 @@ void __init r8a7779_add_standard_devices_dt(void)
platform_add_devices(r8a7779_devices_dt,
ARRAY_SIZE(r8a7779_devices_dt));
of_platform_populate(NULL, of_default_bus_match_table,
r8a7779_auxdata_lookup, NULL);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *r8a7779_compat_dt[] __initdata = {
......
......@@ -19,12 +19,12 @@
*/
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/serial_sci.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/irq-renesas-irqc.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7790.h>
......@@ -149,6 +149,36 @@ static struct resource irqc0_resources[] __initdata = {
&irqc##idx##_data, \
sizeof(struct renesas_irqc_config))
static struct resource thermal_resources[] __initdata = {
DEFINE_RES_MEM(0xe61f0000, 0x14),
DEFINE_RES_MEM(0xe61f0100, 0x38),
DEFINE_RES_IRQ(gic_spi(69)),
};
#define r8a7790_register_thermal() \
platform_device_register_simple("rcar_thermal", -1, \
thermal_resources, \
ARRAY_SIZE(thermal_resources))
static struct sh_timer_config cmt00_platform_data = {
.name = "CMT00",
.timer_bit = 0,
.clockevent_rating = 80,
};
static struct resource cmt00_resources[] = {
DEFINE_RES_MEM(0xffca0510, 0x0c),
DEFINE_RES_MEM(0xffca0500, 0x04),
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
};
#define r8a7790_register_cmt(idx) \
platform_device_register_resndata(&platform_bus, "sh_cmt", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a7790_add_standard_devices(void)
{
r8a7790_register_scif(SCIFA0);
......@@ -162,34 +192,91 @@ void __init r8a7790_add_standard_devices(void)
r8a7790_register_scif(HSCIF0);
r8a7790_register_scif(HSCIF1);
r8a7790_register_irqc(0);
r8a7790_register_thermal();
r8a7790_register_cmt(00);
}
#define MODEMR 0xe6160060
u32 __init r8a7790_read_mode_pins(void)
{
void __iomem *modemr = ioremap_nocache(MODEMR, 4);
u32 mode;
BUG_ON(!modemr);
mode = ioread32(modemr);
iounmap(modemr);
return mode;
}
#define CNTCR 0
#define CNTFID0 0x20
void __init r8a7790_timer_init(void)
{
void __iomem *cntcr;
#ifdef CONFIG_ARM_ARCH_TIMER
u32 mode = r8a7790_read_mode_pins();
void __iomem *base;
int extal_mhz = 0;
u32 freq;
/* At Linux boot time the r8a7790 arch timer comes up
* with the counter disabled. Moreover, it may also report
* a potentially incorrect fixed 13 MHz frequency. To be
* correct these registers need to be updated to use the
* frequency EXTAL / 2 which can be determined by the MD pins.
*/
switch (mode & (MD(14) | MD(13))) {
case 0:
extal_mhz = 15;
break;
case MD(13):
extal_mhz = 20;
break;
case MD(14):
extal_mhz = 26;
break;
case MD(13) | MD(14):
extal_mhz = 30;
break;
}
/* make sure arch timer is started by setting bit 0 of CNTCT */
cntcr = ioremap(0xe6080000, PAGE_SIZE);
iowrite32(1, cntcr);
iounmap(cntcr);
/* The arch timer frequency equals EXTAL / 2 */
freq = extal_mhz * (1000000 / 2);
/* Remap "armgcnt address map" space */
base = ioremap(0xe6080000, PAGE_SIZE);
/* Update registers with correct frequency */
iowrite32(freq, base + CNTFID0);
asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
/* make sure arch timer is started by setting bit 0 of CNTCR */
iowrite32(1, base + CNTCR);
iounmap(base);
#endif /* CONFIG_ARM_ARCH_TIMER */
shmobile_timer_init();
}
#ifdef CONFIG_USE_OF
void __init r8a7790_add_standard_devices_dt(void)
void __init r8a7790_init_delay(void)
{
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
#ifndef CONFIG_ARM_ARCH_TIMER
shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
#endif
}
#ifdef CONFIG_USE_OF
static const char *r8a7790_boards_compat_dt[] __initdata = {
"renesas,r8a7790",
NULL,
};
DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
.init_irq = irqchip_init,
.init_machine = r8a7790_add_standard_devices_dt,
.init_early = r8a7790_init_delay,
.init_time = r8a7790_timer_init,
.dt_compat = r8a7790_boards_compat_dt,
MACHINE_END
......
......@@ -35,7 +35,6 @@
#include <linux/dma-mapping.h>
#include <linux/platform_data/sh_ipmmu.h>
#include <mach/dma-register.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>
#include <mach/common.h>
......@@ -1147,10 +1146,6 @@ void __init sh7372_add_early_devices_dt(void)
shmobile_setup_console();
}
static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
{ }
};
void __init sh7372_add_standard_devices_dt(void)
{
/* clocks are setup late during boot in the case of DT */
......@@ -1159,8 +1154,7 @@ void __init sh7372_add_standard_devices_dt(void)
platform_add_devices(sh7372_early_devices,
ARRAY_SIZE(sh7372_early_devices));
of_platform_populate(NULL, of_default_bus_match_table,
sh7372_auxdata_lookup, NULL);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *sh7372_boards_compat_dt[] __initdata = {
......
......@@ -22,7 +22,6 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
#include <linux/delay.h>
......@@ -35,7 +34,6 @@
#include <linux/platform_data/sh_ipmmu.h>
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
#include <mach/dma-register.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/sh73a0.h>
#include <mach/common.h>
......@@ -61,29 +59,16 @@ void __init sh73a0_map_io(void)
iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));
}
static struct resource sh73a0_pfc_resources[] = {
[0] = {
.start = 0xe6050000,
.end = 0xe6057fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0xe605801c,
.end = 0xe6058027,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device sh73a0_pfc_device = {
.name = "pfc-sh73a0",
.id = -1,
.resource = sh73a0_pfc_resources,
.num_resources = ARRAY_SIZE(sh73a0_pfc_resources),
/* PFC */
static struct resource pfc_resources[] __initdata = {
DEFINE_RES_MEM(0xe6050000, 0x8000),
DEFINE_RES_MEM(0xe605801c, 0x000c),
};
void __init sh73a0_pinmux_init(void)
{
platform_device_register(&sh73a0_pfc_device);
platform_device_register_simple("pfc-sh73a0", -1, pfc_resources,
ARRAY_SIZE(pfc_resources));
}
static struct plat_sci_port scif0_platform_data = {
......@@ -958,10 +943,6 @@ void __init sh73a0_add_early_devices(void)
#ifdef CONFIG_USE_OF
static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
{},
};
void __init sh73a0_add_standard_devices_dt(void)
{
struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, };
......@@ -971,8 +952,7 @@ void __init sh73a0_add_standard_devices_dt(void)
platform_add_devices(sh73a0_devices_dt,
ARRAY_SIZE(sh73a0_devices_dt));
of_platform_populate(NULL, of_default_bus_match_table,
sh73a0_auxdata_lookup, NULL);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
/* Instantiate cpufreq-cpu0 */
platform_device_register_full(&devinfo);
......@@ -988,7 +968,6 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
.map_io = sh73a0_map_io,
.init_early = sh73a0_init_delay,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = irqchip_init,
.init_machine = sh73a0_add_standard_devices_dt,
.dt_compat = sh73a0_boards_compat_dt,
MACHINE_END
......
......@@ -29,6 +29,8 @@
#include <asm/smp_scu.h>
#define EMEV2_SCU_BASE 0x1e000000
#define EMEV2_SMU_BASE 0xe0110000
#define SMU_GENERAL_REG0 0x7c0
static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
......@@ -38,10 +40,18 @@ static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
{
void __iomem *smu;
/* setup EMEV2 specific SCU base, enable */
shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
scu_enable(shmobile_scu_base);
/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
emev2_set_boot_vector(__pa(shmobile_boot_vector));
smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
if (smu) {
iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
iounmap(smu);
}
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
......@@ -49,21 +59,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
}
static void __init emev2_smp_init_cpus(void)
{
unsigned int ncores;
/* setup EMEV2 specific SCU base */
shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
emev2_clock_init(); /* need ioremapped SMU */
ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
shmobile_smp_init_cpus(ncores);
}
struct smp_operations emev2_smp_ops __initdata = {
.smp_init_cpus = emev2_smp_init_cpus,
.smp_prepare_cpus = emev2_smp_prepare_cpus,
.smp_boot_secondary = emev2_boot_secondary,
};
......@@ -30,6 +30,7 @@
#include <linux/spi/mmc_spi.h>
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/platform_data/gpio_backlight.h>
#include <linux/sh_eth.h>
#include <linux/sh_intc.h>
#include <linux/videodev2.h>
......@@ -303,7 +304,7 @@ static struct platform_device usbhs_device = {
.resource = usbhs_resources,
};
/* LCDC */
/* LCDC and backlight */
static const struct fb_videomode ecovec_lcd_modes[] = {
{
.name = "Panel",
......@@ -334,13 +335,6 @@ static const struct fb_videomode ecovec_dvi_modes[] = {
},
};
static int ecovec24_set_brightness(int brightness)
{
gpio_set_value(GPIO_PTR1, brightness);
return 0;
}
static struct sh_mobile_lcdc_info lcdc_info = {
.ch[0] = {
.interface_type = RGB18,
......@@ -350,11 +344,6 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.width = 152,
.height = 91,
},
.bl_info = {
.name = "sh_mobile_lcdc_bl",
.max_brightness = 1,
.set_brightness = ecovec24_set_brightness,
},
}
};
......@@ -380,6 +369,20 @@ static struct platform_device lcdc_device = {
},
};
static struct gpio_backlight_platform_data gpio_backlight_data = {
.fbdev = &lcdc_device.dev,
.gpio = GPIO_PTR1,
.def_value = 1,
.name = "backlight",
};
static struct platform_device gpio_backlight_device = {
.name = "gpio-backlight",
.dev = {
.platform_data = &gpio_backlight_data,
},
};
/* CEU0 */
static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
.flags = SH_CEU_FLAG_USE_8BIT_BUS,
......@@ -1049,6 +1052,7 @@ static struct platform_device *ecovec_devices[] __initdata = {
&usb1_common_device,
&usbhs_device,
&lcdc_device,
&gpio_backlight_device,
&ceu0_device,
&ceu1_device,
&keysc_device,
......@@ -1239,11 +1243,9 @@ static int __init arch_setup(void)
gpio_request(GPIO_PTE6, NULL);
gpio_request(GPIO_PTU1, NULL);
gpio_request(GPIO_PTR1, NULL);
gpio_request(GPIO_PTA2, NULL);
gpio_direction_input(GPIO_PTE6);
gpio_direction_output(GPIO_PTU1, 0);
gpio_direction_output(GPIO_PTR1, 0);
gpio_direction_output(GPIO_PTA2, 0);
/* I/O buffer drive ability is high */
......@@ -1256,6 +1258,9 @@ static int __init arch_setup(void)
lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
/* No backlight */
gpio_backlight_data.fbdev = NULL;
gpio_set_value(GPIO_PTA2, 1);
gpio_set_value(GPIO_PTU1, 1);
} else {
......@@ -1265,8 +1270,6 @@ static int __init arch_setup(void)
lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
gpio_set_value(GPIO_PTR1, 1);
/* FIXME
*
* LCDDON control is needed for Panel,
......
......@@ -276,51 +276,3 @@ void kfr2r09_lcd_start(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
{
write_memory_start(sohandle, so);
}
#define CTRL_CKSW 0x10
#define CTRL_C10 0x20
#define CTRL_CPSW 0x80
#define MAIN_MLED4 0x40
#define MAIN_MSW 0x80
int kfr2r09_lcd_set_brightness(int brightness)
{
struct i2c_adapter *a;
struct i2c_msg msg;
unsigned char buf[2];
int ret;
a = i2c_get_adapter(0);
if (!a)
return -ENODEV;
buf[0] = 0x00;
if (brightness)
buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
else
buf[1] = 0;
msg.addr = 0x75;
msg.buf = buf;
msg.len = 2;
msg.flags = 0;
ret = i2c_transfer(a, &msg, 1);
if (ret != 1)
return -ENODEV;
buf[0] = 0x01;
if (brightness)
buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
else
buf[1] = 0;
msg.addr = 0x75;
msg.buf = buf;
msg.len = 2;
msg.flags = 0;
ret = i2c_transfer(a, &msg, 1);
if (ret != 1)
return -ENODEV;
return 0;
}
......@@ -21,6 +21,7 @@
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/i2c.h>
#include <linux/platform_data/lv5207lp.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/usb/r8a66597.h>
......@@ -159,11 +160,6 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
.setup_sys = kfr2r09_lcd_setup,
.start_transfer = kfr2r09_lcd_start,
},
.bl_info = {
.name = "sh_mobile_lcdc_bl",
.max_brightness = 1,
.set_brightness = kfr2r09_lcd_set_brightness,
},
.sys_bus_cfg = {
.ldmt2r = 0x07010904,
.ldmt3r = 0x14012914,
......@@ -195,6 +191,17 @@ static struct platform_device kfr2r09_sh_lcdc_device = {
},
};
static struct lv5207lp_platform_data kfr2r09_backlight_data = {
.fbdev = &kfr2r09_sh_lcdc_device.dev,
.def_value = 13,
.max_value = 13,
};
static struct i2c_board_info kfr2r09_backlight_board_info = {
I2C_BOARD_INFO("lv5207lp", 0x75),
.platform_data = &kfr2r09_backlight_data,
};
static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
.on_chip = 1,
};
......@@ -627,6 +634,8 @@ static int __init kfr2r09_devices_setup(void)
gpio_request(GPIO_FN_SDHI0CMD, NULL);
gpio_request(GPIO_FN_SDHI0CLK, NULL);
i2c_register_board_info(0, &kfr2r09_backlight_board_info, 1);
return platform_add_devices(kfr2r09_devices,
ARRAY_SIZE(kfr2r09_devices));
}
......
......@@ -4,13 +4,11 @@
#include <video/sh_mobile_lcdc.h>
#if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE)
int kfr2r09_lcd_set_brightness(int brightness);
int kfr2r09_lcd_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
void kfr2r09_lcd_start(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#else
static int kfr2r09_lcd_set_brightness(int brightness) {}
static int kfr2r09_lcd_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
{
......
......@@ -429,18 +429,6 @@ config LEDS_ASIC3
cannot be used. This driver supports hardware blinking with an on+off
period from 62ms to 125s. Say Y to enable LEDs on the HP iPAQ hx4700.
config LEDS_RENESAS_TPU
bool "LED support for Renesas TPU"
depends on LEDS_CLASS=y && HAVE_CLK && GPIOLIB
help
This option enables build of the LED TPU platform driver,
suitable to drive any TPU channel on newer Renesas SoCs.
The driver controls the GPIO pin connected to the LED via
the GPIO framework and expects the LED to be connected to
a pin that can be driven in both GPIO mode and using TPU
pin function. The latter to support brightness control.
Brightness control is supported but hardware blinking is not.
config LEDS_TCA6507
tristate "LED Support for TCA6507 I2C chip"
depends on LEDS_CLASS && I2C
......
......@@ -49,7 +49,6 @@ obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o
obj-$(CONFIG_LEDS_NS2) += leds-ns2.o
obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o
obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o
obj-$(CONFIG_LEDS_RENESAS_TPU) += leds-renesas-tpu.o
obj-$(CONFIG_LEDS_MAX8997) += leds-max8997.o
obj-$(CONFIG_LEDS_LM355x) += leds-lm355x.o
obj-$(CONFIG_LEDS_BLINKM) += leds-blinkm.o
......
/*
* LED control using Renesas TPU
*
* Copyright (C) 2011 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/printk.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/leds.h>
#include <linux/platform_data/leds-renesas-tpu.h>
#include <linux/gpio.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/workqueue.h>
enum r_tpu_pin { R_TPU_PIN_UNUSED, R_TPU_PIN_GPIO, R_TPU_PIN_GPIO_FN };
enum r_tpu_timer { R_TPU_TIMER_UNUSED, R_TPU_TIMER_ON };
struct r_tpu_priv {
struct led_classdev ldev;
void __iomem *mapbase;
struct clk *clk;
struct platform_device *pdev;
enum r_tpu_pin pin_state;
enum r_tpu_timer timer_state;
unsigned long min_rate;
unsigned int refresh_rate;
struct work_struct work;
enum led_brightness new_brightness;
};
static DEFINE_SPINLOCK(r_tpu_lock);
#define TSTR -1 /* Timer start register (shared register) */
#define TCR 0 /* Timer control register (+0x00) */
#define TMDR 1 /* Timer mode register (+0x04) */
#define TIOR 2 /* Timer I/O control register (+0x08) */
#define TIER 3 /* Timer interrupt enable register (+0x0c) */
#define TSR 4 /* Timer status register (+0x10) */
#define TCNT 5 /* Timer counter (+0x14) */
#define TGRA 6 /* Timer general register A (+0x18) */
#define TGRB 7 /* Timer general register B (+0x1c) */
#define TGRC 8 /* Timer general register C (+0x20) */
#define TGRD 9 /* Timer general register D (+0x24) */
static inline u16 r_tpu_read(struct r_tpu_priv *p, int reg_nr)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs = reg_nr << 2;
if (reg_nr == TSTR)
return ioread16(base - cfg->channel_offset);
return ioread16(base + offs);
}
static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr, u16 value)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs = reg_nr << 2;
if (reg_nr == TSTR) {
iowrite16(value, base - cfg->channel_offset);
return;
}
iowrite16(value, base + offs);
}
static void r_tpu_start_stop_ch(struct r_tpu_priv *p, int start)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
unsigned long flags;
u16 value;
/* start stop register shared by multiple timer channels */
spin_lock_irqsave(&r_tpu_lock, flags);
value = r_tpu_read(p, TSTR);
if (start)
value |= 1 << cfg->timer_bit;
else
value &= ~(1 << cfg->timer_bit);
r_tpu_write(p, TSTR, value);
spin_unlock_irqrestore(&r_tpu_lock, flags);
}
static int r_tpu_enable(struct r_tpu_priv *p, enum led_brightness brightness)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
int prescaler[] = { 1, 4, 16, 64 };
int k, ret;
unsigned long rate, tmp;
if (p->timer_state == R_TPU_TIMER_ON)
return 0;
/* wake up device and enable clock */
pm_runtime_get_sync(&p->pdev->dev);
ret = clk_enable(p->clk);
if (ret) {
dev_err(&p->pdev->dev, "cannot enable clock\n");
return ret;
}
/* make sure channel is disabled */
r_tpu_start_stop_ch(p, 0);
/* get clock rate after enabling it */
rate = clk_get_rate(p->clk);
/* pick the lowest acceptable rate */
for (k = ARRAY_SIZE(prescaler) - 1; k >= 0; k--)
if ((rate / prescaler[k]) >= p->min_rate)
break;
if (k < 0) {
dev_err(&p->pdev->dev, "clock rate mismatch\n");
goto err0;
}
dev_dbg(&p->pdev->dev, "rate = %lu, prescaler %u\n",
rate, prescaler[k]);
/* clear TCNT on TGRB match, count on rising edge, set prescaler */
r_tpu_write(p, TCR, 0x0040 | k);
/* output 0 until TGRA, output 1 until TGRB */
r_tpu_write(p, TIOR, 0x0002);
rate /= prescaler[k] * p->refresh_rate;
r_tpu_write(p, TGRB, rate);
dev_dbg(&p->pdev->dev, "TRGB = 0x%04lx\n", rate);
tmp = (cfg->max_brightness - brightness) * rate;
r_tpu_write(p, TGRA, tmp / cfg->max_brightness);
dev_dbg(&p->pdev->dev, "TRGA = 0x%04lx\n", tmp / cfg->max_brightness);
/* PWM mode */
r_tpu_write(p, TMDR, 0x0002);
/* enable channel */
r_tpu_start_stop_ch(p, 1);
p->timer_state = R_TPU_TIMER_ON;
return 0;
err0:
clk_disable(p->clk);
pm_runtime_put_sync(&p->pdev->dev);
return -ENOTSUPP;
}
static void r_tpu_disable(struct r_tpu_priv *p)
{
if (p->timer_state == R_TPU_TIMER_UNUSED)
return;
/* disable channel */
r_tpu_start_stop_ch(p, 0);
/* stop clock and mark device as idle */
clk_disable(p->clk);
pm_runtime_put_sync(&p->pdev->dev);
p->timer_state = R_TPU_TIMER_UNUSED;
}
static void r_tpu_set_pin(struct r_tpu_priv *p, enum r_tpu_pin new_state,
enum led_brightness brightness)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
if (p->pin_state == new_state) {
if (p->pin_state == R_TPU_PIN_GPIO)
gpio_set_value(cfg->pin_gpio, brightness);
return;
}
if (p->pin_state == R_TPU_PIN_GPIO)
gpio_free(cfg->pin_gpio);
if (p->pin_state == R_TPU_PIN_GPIO_FN)
gpio_free(cfg->pin_gpio_fn);
if (new_state == R_TPU_PIN_GPIO)
gpio_request_one(cfg->pin_gpio, !!brightness ?
GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
cfg->name);
if (new_state == R_TPU_PIN_GPIO_FN)
gpio_request(cfg->pin_gpio_fn, cfg->name);
p->pin_state = new_state;
}
static void r_tpu_work(struct work_struct *work)
{
struct r_tpu_priv *p = container_of(work, struct r_tpu_priv, work);
enum led_brightness brightness = p->new_brightness;
r_tpu_disable(p);
/* off and maximum are handled as GPIO pins, in between PWM */
if ((brightness == 0) || (brightness == p->ldev.max_brightness))
r_tpu_set_pin(p, R_TPU_PIN_GPIO, brightness);
else {
r_tpu_set_pin(p, R_TPU_PIN_GPIO_FN, 0);
r_tpu_enable(p, brightness);
}
}
static void r_tpu_set_brightness(struct led_classdev *ldev,
enum led_brightness brightness)
{
struct r_tpu_priv *p = container_of(ldev, struct r_tpu_priv, ldev);
p->new_brightness = brightness;
schedule_work(&p->work);
}
static int r_tpu_probe(struct platform_device *pdev)
{
struct led_renesas_tpu_config *cfg = pdev->dev.platform_data;
struct r_tpu_priv *p;
struct resource *res;
int ret;
if (!cfg) {
dev_err(&pdev->dev, "missing platform data\n");
return -ENODEV;
}
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
if (p == NULL) {
dev_err(&pdev->dev, "failed to allocate driver data\n");
return -ENOMEM;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "failed to get I/O memory\n");
return -ENXIO;
}
/* map memory, let mapbase point to our channel */
p->mapbase = devm_ioremap_nocache(&pdev->dev, res->start,
resource_size(res));
if (p->mapbase == NULL) {
dev_err(&pdev->dev, "failed to remap I/O memory\n");
return -ENXIO;
}
/* get hold of clock */
p->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(p->clk)) {
dev_err(&pdev->dev, "cannot get clock\n");
return PTR_ERR(p->clk);
}
p->pdev = pdev;
p->pin_state = R_TPU_PIN_UNUSED;
p->timer_state = R_TPU_TIMER_UNUSED;
p->refresh_rate = cfg->refresh_rate ? cfg->refresh_rate : 100;
r_tpu_set_pin(p, R_TPU_PIN_GPIO, LED_OFF);
platform_set_drvdata(pdev, p);
INIT_WORK(&p->work, r_tpu_work);
p->ldev.name = cfg->name;
p->ldev.brightness = LED_OFF;
p->ldev.max_brightness = cfg->max_brightness;
p->ldev.brightness_set = r_tpu_set_brightness;
p->ldev.flags |= LED_CORE_SUSPENDRESUME;
ret = led_classdev_register(&pdev->dev, &p->ldev);
if (ret < 0)
goto err0;
/* max_brightness may be updated by the LED core code */
p->min_rate = p->ldev.max_brightness * p->refresh_rate;
pm_runtime_enable(&pdev->dev);
return 0;
err0:
r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
return ret;
}
static int r_tpu_remove(struct platform_device *pdev)
{
struct r_tpu_priv *p = platform_get_drvdata(pdev);
r_tpu_set_brightness(&p->ldev, LED_OFF);
led_classdev_unregister(&p->ldev);
cancel_work_sync(&p->work);
r_tpu_disable(p);
r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
pm_runtime_disable(&pdev->dev);
return 0;
}
static struct platform_driver r_tpu_device_driver = {
.probe = r_tpu_probe,
.remove = r_tpu_remove,
.driver = {
.name = "leds-renesas-tpu",
}
};
module_platform_driver(r_tpu_device_driver);
MODULE_AUTHOR("Magnus Damm");
MODULE_DESCRIPTION("Renesas TPU LED Driver");
MODULE_LICENSE("GPL v2");
......@@ -425,6 +425,25 @@ config BACKLIGHT_AS3711
If you have an Austrian Microsystems AS3711 say Y to enable the
backlight driver.
config BACKLIGHT_GPIO
tristate "Generic GPIO based Backlight Driver"
depends on GPIOLIB
help
If you have a LCD backlight adjustable by GPIO, say Y to enable
this driver.
config BACKLIGHT_LV5207LP
tristate "Sanyo LV5207LP Backlight"
depends on I2C
help
If you have a Sanyo LV5207LP say Y to enable the backlight driver.
config BACKLIGHT_BD6107
tristate "Rohm BD6107 Backlight"
depends on I2C
help
If you have a Rohm BD6107 say Y to enable the backlight driver.
endif # BACKLIGHT_CLASS_DEVICE
endif # BACKLIGHT_LCD_SUPPORT
......@@ -26,12 +26,14 @@ obj-$(CONFIG_BACKLIGHT_ADP8870) += adp8870_bl.o
obj-$(CONFIG_BACKLIGHT_APPLE) += apple_bl.o
obj-$(CONFIG_BACKLIGHT_AS3711) += as3711_bl.o
obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o
obj-$(CONFIG_BACKLIGHT_BD6107) += bd6107.o
obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
obj-$(CONFIG_BACKLIGHT_DA903X) += da903x_bl.o
obj-$(CONFIG_BACKLIGHT_DA9052) += da9052_bl.o
obj-$(CONFIG_BACKLIGHT_EP93XX) += ep93xx_bl.o
obj-$(CONFIG_BACKLIGHT_GENERIC) += generic_bl.o
obj-$(CONFIG_BACKLIGHT_GPIO) += gpio_backlight.o
obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o
obj-$(CONFIG_BACKLIGHT_HP700) += jornada720_bl.o
obj-$(CONFIG_BACKLIGHT_LM3533) += lm3533_bl.o
......@@ -40,6 +42,7 @@ obj-$(CONFIG_BACKLIGHT_LM3639) += lm3639_bl.o
obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
obj-$(CONFIG_BACKLIGHT_LP855X) += lp855x_bl.o
obj-$(CONFIG_BACKLIGHT_LP8788) += lp8788_bl.o
obj-$(CONFIG_BACKLIGHT_LV5207LP) += lv5207lp.o
obj-$(CONFIG_BACKLIGHT_MAX8925) += max8925_bl.o
obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o
obj-$(CONFIG_BACKLIGHT_OT200) += ot200_bl.o
......
This diff is collapsed.
/*
* gpio_backlight.c - Simple GPIO-controlled backlight
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/backlight.h>
#include <linux/err.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_data/gpio_backlight.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
struct gpio_backlight {
struct device *dev;
struct device *fbdev;
int gpio;
int active;
};
static int gpio_backlight_update_status(struct backlight_device *bl)
{
struct gpio_backlight *gbl = bl_get_data(bl);
int brightness = bl->props.brightness;
if (bl->props.power != FB_BLANK_UNBLANK ||
bl->props.fb_blank != FB_BLANK_UNBLANK ||
bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
brightness = 0;
gpio_set_value(gbl->gpio, brightness ? gbl->active : !gbl->active);
return 0;
}
static int gpio_backlight_get_brightness(struct backlight_device *bl)
{
return bl->props.brightness;
}
static int gpio_backlight_check_fb(struct backlight_device *bl,
struct fb_info *info)
{
struct gpio_backlight *gbl = bl_get_data(bl);
return gbl->fbdev == NULL || gbl->fbdev == info->dev;
}
static const struct backlight_ops gpio_backlight_ops = {
.options = BL_CORE_SUSPENDRESUME,
.update_status = gpio_backlight_update_status,
.get_brightness = gpio_backlight_get_brightness,
.check_fb = gpio_backlight_check_fb,
};
static int gpio_backlight_probe(struct platform_device *pdev)
{
struct gpio_backlight_platform_data *pdata = pdev->dev.platform_data;
struct backlight_properties props;
struct backlight_device *bl;
struct gpio_backlight *gbl;
int ret;
if (!pdata) {
dev_err(&pdev->dev, "failed to find platform data\n");
return -ENODEV;
}
gbl = devm_kzalloc(&pdev->dev, sizeof(*gbl), GFP_KERNEL);
if (gbl == NULL)
return -ENOMEM;
gbl->dev = &pdev->dev;
gbl->fbdev = pdata->fbdev;
gbl->gpio = pdata->gpio;
gbl->active = pdata->active_low ? 0 : 1;
ret = devm_gpio_request_one(gbl->dev, gbl->gpio, GPIOF_DIR_OUT |
(gbl->active ? GPIOF_INIT_LOW
: GPIOF_INIT_HIGH),
pdata->name);
if (ret < 0) {
dev_err(&pdev->dev, "unable to request GPIO\n");
return ret;
}
memset(&props, 0, sizeof(props));
props.type = BACKLIGHT_RAW;
props.max_brightness = 1;
bl = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, gbl,
&gpio_backlight_ops, &props);
if (IS_ERR(bl)) {
dev_err(&pdev->dev, "failed to register backlight\n");
return PTR_ERR(bl);
}
bl->props.brightness = pdata->def_value;
backlight_update_status(bl);
platform_set_drvdata(pdev, bl);
return 0;
}
static int gpio_backlight_remove(struct platform_device *pdev)
{
struct backlight_device *bl = platform_get_drvdata(pdev);
backlight_device_unregister(bl);
return 0;
}
static struct platform_driver gpio_backlight_driver = {
.driver = {
.name = "gpio-backlight",
.owner = THIS_MODULE,
},
.probe = gpio_backlight_probe,
.remove = gpio_backlight_remove,
};
module_platform_driver(gpio_backlight_driver);
MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
MODULE_DESCRIPTION("GPIO-based Backlight Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:gpio-backlight");
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment