Commit f0de8369 authored by Shawn Guo's avatar Shawn Guo Committed by Chris Ball

mmc: sdhci: change sdhci-pltfm into a module

There are a couple of problems left from the sdhci pltfm and OF
consolidation changes.

* When building more than one sdhci-pltfm based drivers in the same
  image, linker will give multiple definition error on the sdhci-pltfm
  helper functions.  For example right now, building sdhci-of-esdhc
  and sdhci-of-hlwd together is a valid combination from Kconfig view.

* With the current build method, there is error with building the
  drivers as module, but module installation fails with modprobe.

The patch fixes above problems by changing sdhci-pltfm into a module.
To avoid EXPORT_SYMBOL on so many big endian IO accessors, it moves
these accessors into sdhci-pltfm.h as the 'static inline' functions.
As a result, sdhci.h needs to be included in sdhci-pltfm.h, and in
turn can be removed from individual drivers which already include
sdhci-pltfm.h.
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 100e9186
...@@ -81,19 +81,32 @@ config MMC_RICOH_MMC ...@@ -81,19 +81,32 @@ config MMC_RICOH_MMC
If unsure, say Y. If unsure, say Y.
config MMC_SDHCI_OF_ESDHC config MMC_SDHCI_PLTFM
bool "SDHCI OF support for the Freescale eSDHC controller" tristate "SDHCI platform and OF driver helper"
depends on MMC_SDHCI depends on MMC_SDHCI
help
This selects the common helper functions support for Secure Digital
Host Controller Interface based platform and OF drivers.
If you have a controller with this interface, say Y or M here.
If unsure, say N.
config MMC_SDHCI_OF_ESDHC
tristate "SDHCI OF support for the Freescale eSDHC controller"
depends on MMC_SDHCI_PLTFM
depends on PPC_OF depends on PPC_OF
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help help
This selects the Freescale eSDHC controller support. This selects the Freescale eSDHC controller support.
If you have a controller with this interface, say Y or M here.
If unsure, say N. If unsure, say N.
config MMC_SDHCI_OF_HLWD config MMC_SDHCI_OF_HLWD
bool "SDHCI OF support for the Nintendo Wii SDHCI controllers" tristate "SDHCI OF support for the Nintendo Wii SDHCI controllers"
depends on MMC_SDHCI depends on MMC_SDHCI_PLTFM
depends on PPC_OF depends on PPC_OF
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help help
...@@ -101,43 +114,51 @@ config MMC_SDHCI_OF_HLWD ...@@ -101,43 +114,51 @@ config MMC_SDHCI_OF_HLWD
found in the "Hollywood" chipset of the Nintendo Wii video game found in the "Hollywood" chipset of the Nintendo Wii video game
console. console.
If you have a controller with this interface, say Y or M here.
If unsure, say N. If unsure, say N.
config MMC_SDHCI_CNS3XXX config MMC_SDHCI_CNS3XXX
tristate "SDHCI support on the Cavium Networks CNS3xxx SoC" tristate "SDHCI support on the Cavium Networks CNS3xxx SoC"
depends on ARCH_CNS3XXX depends on ARCH_CNS3XXX
depends on MMC_SDHCI depends on MMC_SDHCI_PLTFM
help help
This selects the SDHCI support for CNS3xxx System-on-Chip devices. This selects the SDHCI support for CNS3xxx System-on-Chip devices.
If you have a controller with this interface, say Y or M here.
If unsure, say N. If unsure, say N.
config MMC_SDHCI_ESDHC_IMX config MMC_SDHCI_ESDHC_IMX
tristate "SDHCI platform support for the Freescale eSDHC i.MX controller" tristate "SDHCI platform support for the Freescale eSDHC i.MX controller"
depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5 depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5
depends on MMC_SDHCI depends on MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS select MMC_SDHCI_IO_ACCESSORS
help help
This selects the Freescale eSDHC controller support on the platform This selects the Freescale eSDHC controller support on the platform
bus, found on platforms like mx35/51. bus, found on platforms like mx35/51.
If you have a controller with this interface, say Y or M here.
If unsure, say N. If unsure, say N.
config MMC_SDHCI_DOVE config MMC_SDHCI_DOVE
tristate "SDHCI support on Marvell's Dove SoC" tristate "SDHCI support on Marvell's Dove SoC"
depends on ARCH_DOVE depends on ARCH_DOVE
depends on MMC_SDHCI depends on MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS select MMC_SDHCI_IO_ACCESSORS
help help
This selects the Secure Digital Host Controller Interface in This selects the Secure Digital Host Controller Interface in
Marvell's Dove SoC. Marvell's Dove SoC.
If you have a controller with this interface, say Y or M here.
If unsure, say N. If unsure, say N.
config MMC_SDHCI_TEGRA config MMC_SDHCI_TEGRA
tristate "SDHCI platform support for the Tegra SD/MMC Controller" tristate "SDHCI platform support for the Tegra SD/MMC Controller"
depends on ARCH_TEGRA depends on ARCH_TEGRA
depends on MMC_SDHCI depends on MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS select MMC_SDHCI_IO_ACCESSORS
help help
This selects the Tegra SD/MMC controller. If you have a Tegra This selects the Tegra SD/MMC controller. If you have a Tegra
......
...@@ -44,18 +44,13 @@ obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o ...@@ -44,18 +44,13 @@ obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
obj-$(CONFIG_MMC_VUB300) += vub300.o obj-$(CONFIG_MMC_VUB300) += vub300.o
obj-$(CONFIG_MMC_USHC) += ushc.o obj-$(CONFIG_MMC_USHC) += ushc.o
obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
sdhci-cns3xxx-objs := sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
sdhci-esdhc-imx-objs := sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o
sdhci-dove-objs := sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
sdhci-tegra-objs := sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
sdhci-of-esdhc-objs := sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o
sdhci-of-hlwd-objs := sdhci-pltfm.o
ifeq ($(CONFIG_CB710_DEBUG),y) ifeq ($(CONFIG_CB710_DEBUG),y)
CFLAGS-cb710-mmc += -DDEBUG CFLAGS-cb710-mmc += -DDEBUG
......
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
#include <linux/device.h> #include <linux/device.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include <mach/cns3xxx.h> #include <mach/cns3xxx.h>
#include "sdhci.h"
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host) static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host)
......
...@@ -22,7 +22,6 @@ ...@@ -22,7 +22,6 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include "sdhci.h"
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
static u16 sdhci_dove_readw(struct sdhci_host *host, int reg) static u16 sdhci_dove_readw(struct sdhci_host *host, int reg)
......
...@@ -22,7 +22,6 @@ ...@@ -22,7 +22,6 @@
#include <linux/mmc/sdio.h> #include <linux/mmc/sdio.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/esdhc.h> #include <mach/esdhc.h>
#include "sdhci.h"
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
#include "sdhci-esdhc.h" #include "sdhci-esdhc.h"
......
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
#include "sdhci.h"
#include "sdhci-esdhc.h" #include "sdhci-esdhc.h"
static u16 esdhc_readw(struct sdhci_host *host, int reg) static u16 esdhc_readw(struct sdhci_host *host, int reg)
......
...@@ -22,7 +22,6 @@ ...@@ -22,7 +22,6 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
#include "sdhci.h"
/* /*
* Ops and quirks for the Nintendo Wii SDHCI controllers. * Ops and quirks for the Nintendo Wii SDHCI controllers.
......
...@@ -33,69 +33,11 @@ ...@@ -33,69 +33,11 @@
#ifdef CONFIG_PPC #ifdef CONFIG_PPC
#include <asm/machdep.h> #include <asm/machdep.h>
#endif #endif
#include "sdhci.h"
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
static struct sdhci_ops sdhci_pltfm_ops = { static struct sdhci_ops sdhci_pltfm_ops = {
}; };
#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
/*
* These accessors are designed for big endian hosts doing I/O to
* little endian controllers incorporating a 32-bit hardware byte swapper.
*/
u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
{
return in_be32(host->ioaddr + reg);
}
u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
{
return in_be16(host->ioaddr + (reg ^ 0x2));
}
u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
{
return in_8(host->ioaddr + (reg ^ 0x3));
}
void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
{
out_be32(host->ioaddr + reg, val);
}
void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
int base = reg & ~0x3;
int shift = (reg & 0x2) * 8;
switch (reg) {
case SDHCI_TRANSFER_MODE:
/*
* Postpone this write, we must do it together with a
* command write that is down below.
*/
pltfm_host->xfer_mode_shadow = val;
return;
case SDHCI_COMMAND:
sdhci_be32bs_writel(host,
val << 16 | pltfm_host->xfer_mode_shadow,
SDHCI_TRANSFER_MODE);
return;
}
clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
}
void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
{
int base = reg & ~0x3;
int shift = (reg & 0x3) * 8;
clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
}
#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
#ifdef CONFIG_OF #ifdef CONFIG_OF
static bool sdhci_of_wp_inverted(struct device_node *np) static bool sdhci_of_wp_inverted(struct device_node *np)
{ {
...@@ -136,6 +78,7 @@ void sdhci_get_of_property(struct platform_device *pdev) ...@@ -136,6 +78,7 @@ void sdhci_get_of_property(struct platform_device *pdev)
#else #else
void sdhci_get_of_property(struct platform_device *pdev) {} void sdhci_get_of_property(struct platform_device *pdev) {}
#endif /* CONFIG_OF */ #endif /* CONFIG_OF */
EXPORT_SYMBOL_GPL(sdhci_get_of_property);
struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
struct sdhci_pltfm_data *pdata) struct sdhci_pltfm_data *pdata)
...@@ -202,6 +145,7 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, ...@@ -202,6 +145,7 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
dev_err(&pdev->dev, "%s failed %d\n", __func__, ret); dev_err(&pdev->dev, "%s failed %d\n", __func__, ret);
return ERR_PTR(ret); return ERR_PTR(ret);
} }
EXPORT_SYMBOL_GPL(sdhci_pltfm_init);
void sdhci_pltfm_free(struct platform_device *pdev) void sdhci_pltfm_free(struct platform_device *pdev)
{ {
...@@ -213,6 +157,7 @@ void sdhci_pltfm_free(struct platform_device *pdev) ...@@ -213,6 +157,7 @@ void sdhci_pltfm_free(struct platform_device *pdev)
sdhci_free_host(host); sdhci_free_host(host);
platform_set_drvdata(pdev, NULL); platform_set_drvdata(pdev, NULL);
} }
EXPORT_SYMBOL_GPL(sdhci_pltfm_free);
int sdhci_pltfm_register(struct platform_device *pdev, int sdhci_pltfm_register(struct platform_device *pdev,
struct sdhci_pltfm_data *pdata) struct sdhci_pltfm_data *pdata)
...@@ -232,6 +177,7 @@ int sdhci_pltfm_register(struct platform_device *pdev, ...@@ -232,6 +177,7 @@ int sdhci_pltfm_register(struct platform_device *pdev,
return ret; return ret;
} }
EXPORT_SYMBOL_GPL(sdhci_pltfm_register);
int sdhci_pltfm_unregister(struct platform_device *pdev) int sdhci_pltfm_unregister(struct platform_device *pdev)
{ {
...@@ -243,6 +189,7 @@ int sdhci_pltfm_unregister(struct platform_device *pdev) ...@@ -243,6 +189,7 @@ int sdhci_pltfm_unregister(struct platform_device *pdev)
return 0; return 0;
} }
EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister);
#ifdef CONFIG_PM #ifdef CONFIG_PM
int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state) int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state)
...@@ -251,6 +198,7 @@ int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state) ...@@ -251,6 +198,7 @@ int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state)
return sdhci_suspend_host(host, state); return sdhci_suspend_host(host, state);
} }
EXPORT_SYMBOL_GPL(sdhci_pltfm_suspend);
int sdhci_pltfm_resume(struct platform_device *dev) int sdhci_pltfm_resume(struct platform_device *dev)
{ {
...@@ -258,4 +206,22 @@ int sdhci_pltfm_resume(struct platform_device *dev) ...@@ -258,4 +206,22 @@ int sdhci_pltfm_resume(struct platform_device *dev)
return sdhci_resume_host(host); return sdhci_resume_host(host);
} }
EXPORT_SYMBOL_GPL(sdhci_pltfm_resume);
#endif /* CONFIG_PM */ #endif /* CONFIG_PM */
static int __init sdhci_pltfm_drv_init(void)
{
pr_info("sdhci-pltfm: SDHCI platform and OF driver helper\n");
return 0;
}
module_init(sdhci_pltfm_drv_init);
static void __exit sdhci_pltfm_drv_exit(void)
{
}
module_exit(sdhci_pltfm_drv_exit);
MODULE_DESCRIPTION("SDHCI platform and OF driver helper");
MODULE_AUTHOR("Intel Corporation");
MODULE_LICENSE("GPL v2");
...@@ -12,9 +12,8 @@ ...@@ -12,9 +12,8 @@
#define _DRIVERS_MMC_SDHCI_PLTFM_H #define _DRIVERS_MMC_SDHCI_PLTFM_H
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/types.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/mmc/sdhci.h> #include "sdhci.h"
struct sdhci_pltfm_data { struct sdhci_pltfm_data {
struct sdhci_ops *ops; struct sdhci_ops *ops;
...@@ -31,13 +30,63 @@ struct sdhci_pltfm_host { ...@@ -31,13 +30,63 @@ struct sdhci_pltfm_host {
}; };
#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER #ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg); /*
extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg); * These accessors are designed for big endian hosts doing I/O to
extern u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg); * little endian controllers incorporating a 32-bit hardware byte swapper.
extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg); */
extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg); static inline u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg); {
#endif return in_be32(host->ioaddr + reg);
}
static inline u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
{
return in_be16(host->ioaddr + (reg ^ 0x2));
}
static inline u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
{
return in_8(host->ioaddr + (reg ^ 0x3));
}
static inline void sdhci_be32bs_writel(struct sdhci_host *host,
u32 val, int reg)
{
out_be32(host->ioaddr + reg, val);
}
static inline void sdhci_be32bs_writew(struct sdhci_host *host,
u16 val, int reg)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
int base = reg & ~0x3;
int shift = (reg & 0x2) * 8;
switch (reg) {
case SDHCI_TRANSFER_MODE:
/*
* Postpone this write, we must do it together with a
* command write that is down below.
*/
pltfm_host->xfer_mode_shadow = val;
return;
case SDHCI_COMMAND:
sdhci_be32bs_writel(host,
val << 16 | pltfm_host->xfer_mode_shadow,
SDHCI_TRANSFER_MODE);
return;
}
clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
}
static inline void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
{
int base = reg & ~0x3;
int shift = (reg & 0x3) * 8;
clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
}
#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
extern void sdhci_get_of_property(struct platform_device *pdev); extern void sdhci_get_of_property(struct platform_device *pdev);
......
...@@ -24,7 +24,6 @@ ...@@ -24,7 +24,6 @@
#include <mach/gpio.h> #include <mach/gpio.h>
#include <mach/sdhci.h> #include <mach/sdhci.h>
#include "sdhci.h"
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg) static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment