Commit f43c72ba authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher

drm/amdgpu: initialize VEGAM GMC (v2)

v2: use proper register rather than hardcoding.
Signed-off-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 13b75aac
...@@ -569,9 +569,10 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev) ...@@ -569,9 +569,10 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
/* set the gart size */ /* set the gart size */
if (amdgpu_gart_size == -1) { if (amdgpu_gart_size == -1) {
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_POLARIS11: /* all engines support GPUVM */
case CHIP_POLARIS10: /* all engines support GPUVM */ case CHIP_POLARIS10: /* all engines support GPUVM */
case CHIP_POLARIS11: /* all engines support GPUVM */
case CHIP_POLARIS12: /* all engines support GPUVM */ case CHIP_POLARIS12: /* all engines support GPUVM */
case CHIP_VEGAM: /* all engines support GPUVM */
default: default:
adev->gmc.gart_size = 256ULL << 20; adev->gmc.gart_size = 256ULL << 20;
break; break;
...@@ -1091,7 +1092,8 @@ static int gmc_v8_0_sw_init(void *handle) ...@@ -1091,7 +1092,8 @@ static int gmc_v8_0_sw_init(void *handle)
} else { } else {
u32 tmp; u32 tmp;
if (adev->asic_type == CHIP_FIJI) if ((adev->asic_type == CHIP_FIJI) ||
(adev->asic_type == CHIP_VEGAM))
tmp = RREG32(mmMC_SEQ_MISC0_FIJI); tmp = RREG32(mmMC_SEQ_MISC0_FIJI);
else else
tmp = RREG32(mmMC_SEQ_MISC0); tmp = RREG32(mmMC_SEQ_MISC0);
......
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