Commit f440eb13 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter

drm/i915: Enable the overlay right after primary and cursor planes

Again follow the same sequence for all generations, because doing
otherwise just doesn't make sense.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5c38d48c
......@@ -3622,11 +3622,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_enable_plane(dev_priv, plane, pipe);
intel_crtc_update_cursor(crtc, true);
intel_update_fbc(dev);
/* Give the overlay scaler a chance to enable if it's on this pipe */
intel_crtc_dpms_overlay(intel_crtc, true);
intel_update_fbc(dev);
mutex_unlock(&dev_priv->dpio_lock);
}
......@@ -3664,11 +3664,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
if (IS_G4X(dev))
g4x_fixup_plane(dev_priv, pipe);
intel_update_fbc(dev);
/* Give the overlay scaler a chance to enable if it's on this pipe */
intel_crtc_dpms_overlay(intel_crtc, true);
intel_update_fbc(dev);
for_each_encoder_on_crtc(dev, crtc, encoder)
encoder->enable(encoder);
}
......
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