Commit f61f5a21 authored by Chris Packham's avatar Chris Packham Committed by Linus Walleij

pinctrl: mvebu: update use "nand" function for "rb" pin

The Armada 98dx3236 SoCs don't have a different MPP sel value for nand
specific pins so "dev" was technically correct. But all the other Armada
SoCs use "nand" in their dts and the pin is specific to the nand
interface so use "nand" for the function name.
Signed-off-by: default avatarChris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 09f5c8ec
...@@ -431,7 +431,7 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = { ...@@ -431,7 +431,7 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
MPP_MODE(19, MPP_MODE(19,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS), MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS),
MPP_VAR_FUNCTION(0x4, "dev", "rb", V_98DX3236_PLUS)), MPP_VAR_FUNCTION(0x4, "nand", "rb", V_98DX3236_PLUS)),
MPP_MODE(20, MPP_MODE(20,
MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)), MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)),
......
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