Commit f623e597 authored by Aya Levin's avatar Aya Levin Committed by Saeed Mahameed

ethtool: Add support for low latency RS FEC

Add support for low latency Reed Solomon FEC as LLRS.

The LL-FEC is defined by the 25G/50G ethernet consortium,
in the document titled "Low Latency Reed Solomon Forward Error Correction"
Signed-off-by: default avatarAya Levin <ayal@mellanox.com>
Reviewed-by: default avatarEran Ben Elisha <eranbe@mellanox.com>
CC: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
parent 3c19208e
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
const char *phy_speed_to_str(int speed) const char *phy_speed_to_str(int speed)
{ {
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 74, BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 75,
"Enum ethtool_link_mode_bit_indices and phylib are out of sync. " "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
"If a speed or mode has been added please update phy_speed_to_str " "If a speed or mode has been added please update phy_speed_to_str "
"and the PHY settings array.\n"); "and the PHY settings array.\n");
......
...@@ -1330,6 +1330,7 @@ enum ethtool_fec_config_bits { ...@@ -1330,6 +1330,7 @@ enum ethtool_fec_config_bits {
ETHTOOL_FEC_OFF_BIT, ETHTOOL_FEC_OFF_BIT,
ETHTOOL_FEC_RS_BIT, ETHTOOL_FEC_RS_BIT,
ETHTOOL_FEC_BASER_BIT, ETHTOOL_FEC_BASER_BIT,
ETHTOOL_FEC_LLRS_BIT,
}; };
#define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT) #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT)
...@@ -1337,6 +1338,7 @@ enum ethtool_fec_config_bits { ...@@ -1337,6 +1338,7 @@ enum ethtool_fec_config_bits {
#define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT) #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT)
#define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT)
#define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT)
#define ETHTOOL_FEC_LLRS (1 << ETHTOOL_FEC_LLRS_BIT)
/* CMDs currently supported */ /* CMDs currently supported */
#define ETHTOOL_GSET 0x00000001 /* DEPRECATED, Get settings. #define ETHTOOL_GSET 0x00000001 /* DEPRECATED, Get settings.
...@@ -1521,7 +1523,7 @@ enum ethtool_link_mode_bit_indices { ...@@ -1521,7 +1523,7 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71, ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72, ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72,
ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73, ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73,
ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74,
/* must be last entry */ /* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS __ETHTOOL_LINK_MODE_MASK_NBITS
}; };
......
...@@ -168,6 +168,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = { ...@@ -168,6 +168,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
__DEFINE_LINK_MODE_NAME(400000, LR8_ER8_FR8, Full), __DEFINE_LINK_MODE_NAME(400000, LR8_ER8_FR8, Full),
__DEFINE_LINK_MODE_NAME(400000, DR8, Full), __DEFINE_LINK_MODE_NAME(400000, DR8, Full),
__DEFINE_LINK_MODE_NAME(400000, CR8, Full), __DEFINE_LINK_MODE_NAME(400000, CR8, Full),
__DEFINE_SPECIAL_MODE_NAME(FEC_LLRS, "LLRS"),
}; };
static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
......
...@@ -237,6 +237,7 @@ static const struct link_mode_info link_mode_params[] = { ...@@ -237,6 +237,7 @@ static const struct link_mode_info link_mode_params[] = {
__DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full), __DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full),
__DEFINE_LINK_MODE_PARAMS(400000, DR8, Full), __DEFINE_LINK_MODE_PARAMS(400000, DR8, Full),
__DEFINE_LINK_MODE_PARAMS(400000, CR8, Full), __DEFINE_LINK_MODE_PARAMS(400000, CR8, Full),
__DEFINE_SPECIAL_MODE_PARAMS(FEC_LLRS),
}; };
static const struct nla_policy static const struct nla_policy
......
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