Commit f79a13fe authored by Lubomir Rintel's avatar Lubomir Rintel

dt-bindings: mrvl,intc: Add a MMP3 interrupt controller

Similar to MMP2 one, but has an extra range for the other core. The
muxes stay the same.
Signed-off-by: default avatarLubomir Rintel <lkundrak@v3.sk>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
parent 95aecb71
* Marvell MMP Interrupt controller * Marvell MMP Interrupt controller
Required properties: Required properties:
- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or - compatible : Should be
"mrvl,mmp2-mux-intc" "mrvl,mmp-intc" on Marvel MMP,
"mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or
"marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3
- reg : Address and length of the register set of the interrupt controller. - reg : Address and length of the register set of the interrupt controller.
If the interrupt controller is intc, address and length means the range If the interrupt controller is intc, address and length means the range
of the whole interrupt controller. If the interrupt controller is mux-intc, of the whole interrupt controller. The "marvell,mmp3-intc" controller
address and length means one register. Since address of mux-intc is in the also has a secondary range for the second CPU core. If the interrupt
range of intc. mux-intc is secondary interrupt controller. controller is mux-intc, address and length means one register. Since
address of mux-intc is in the range of intc. mux-intc is secondary
interrupt controller.
- reg-names : Name of the register set of the interrupt controller. It's - reg-names : Name of the register set of the interrupt controller. It's
only required in mux-intc interrupt controller. only required in mux-intc interrupt controller.
- interrupts : Should be the port interrupt shared by mux interrupts. It's - interrupts : Should be the port interrupt shared by mux interrupts. It's
......
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