Commit f9388257 authored by Simon Horman's avatar Simon Horman Committed by Chris Ball

mmc: sh_mmcif: double clock speed

Correct an off-by one error when calculating the clock divisor in cases
where the host clock is a power of two of the target clock.  Previously the
divisor was one greater than the correct value in these cases leading to
the clock being set at half the desired speed.

Thanks to Guennadi Liakhovetski for working with me on the logic for this
change.
Tested-by: default avatarCao Minh Hiep <hiepcm@gmail.com>
Acked-by: default avatarGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: default avatarSimon Horman <horms@verge.net.au>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 5865f287
...@@ -454,7 +454,8 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk) ...@@ -454,7 +454,8 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK); sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK);
else else
sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR &
((fls(host->clk / clk) - 1) << 16)); ((fls(DIV_ROUND_UP(host->clk,
clk) - 1) - 1) << 16));
sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE);
} }
......
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