Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
nexedi
linux
Commits
fa353e9f
Commit
fa353e9f
authored
Dec 31, 2010
by
Kukjin Kim
Browse files
Options
Browse Files
Download
Plain Diff
Merge branch 'dev/s5pv310-irq' into next-s5pv310
parents
a8928ce7
85140ad5
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
24 additions
and
4 deletions
+24
-4
arch/arm/mach-s5pv310/cpu.c
arch/arm/mach-s5pv310/cpu.c
+9
-0
arch/arm/mach-s5pv310/include/mach/irqs.h
arch/arm/mach-s5pv310/include/mach/irqs.h
+10
-3
arch/arm/mach-s5pv310/irq-combiner.c
arch/arm/mach-s5pv310/irq-combiner.c
+5
-1
No files found.
arch/arm/mach-s5pv310/cpu.c
View file @
fa353e9f
...
...
@@ -132,6 +132,15 @@ void __init s5pv310_init_irq(void)
gic_cpu_init
(
0
,
S5P_VA_GIC_CPU
);
for
(
irq
=
0
;
irq
<
MAX_COMBINER_NR
;
irq
++
)
{
/*
* From SPI(0) to SPI(39) and SPI(51), SPI(53) are
* connected to the interrupt combiner. These irqs
* should be initialized to support cascade interrupt.
*/
if
((
irq
>=
40
)
&&
!
(
irq
==
51
)
&&
!
(
irq
==
53
))
continue
;
combiner_init
(
irq
,
(
void
__iomem
*
)
S5P_VA_COMBINER
(
irq
),
COMBINER_IRQ
(
irq
,
0
));
combiner_cascade_irq
(
irq
,
IRQ_SPI
(
irq
));
...
...
arch/arm/mach-s5pv310/include/mach/irqs.h
View file @
fa353e9f
...
...
@@ -25,6 +25,8 @@
#define IRQ_SPI(x) S5P_IRQ(x+32)
#define IRQ_MCT1 IRQ_SPI(35)
#define IRQ_EINT0 IRQ_SPI(40)
#define IRQ_EINT1 IRQ_SPI(41)
#define IRQ_EINT2 IRQ_SPI(42)
...
...
@@ -36,9 +38,8 @@
#define IRQ_JPEG IRQ_SPI(48)
#define IRQ_2D IRQ_SPI(49)
#define IRQ_PCIE IRQ_SPI(50)
#define IRQ_
SYSTEM_TIMER
IRQ_SPI(51)
#define IRQ_
MCT0
IRQ_SPI(51)
#define IRQ_MFC IRQ_SPI(52)
#define IRQ_WDT IRQ_SPI(53)
#define IRQ_AUDIO_SS IRQ_SPI(54)
#define IRQ_AC97 IRQ_SPI(55)
#define IRQ_SPDIF IRQ_SPI(56)
...
...
@@ -85,6 +86,8 @@
#define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0)
#define IRQ_MCT_L1 COMBINER_IRQ(35, 3)
#define IRQ_EINT4 COMBINER_IRQ(37, 0)
#define IRQ_EINT5 COMBINER_IRQ(37, 1)
#define IRQ_EINT6 COMBINER_IRQ(37, 2)
...
...
@@ -101,7 +104,11 @@
#define IRQ_EINT16_31 COMBINER_IRQ(39, 0)
#define MAX_COMBINER_NR 40
#define IRQ_MCT_L0 COMBINER_IRQ(51, 0)
#define IRQ_WDT COMBINER_IRQ(53, 0)
#define MAX_COMBINER_NR 54
#define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0)
...
...
arch/arm/mach-s5pv310/irq-combiner.c
View file @
fa353e9f
...
...
@@ -24,6 +24,7 @@ static DEFINE_SPINLOCK(irq_controller_lock);
struct
combiner_chip_data
{
unsigned
int
irq_offset
;
unsigned
int
irq_mask
;
void
__iomem
*
base
;
};
...
...
@@ -62,6 +63,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
spin_lock
(
&
irq_controller_lock
);
status
=
__raw_readl
(
chip_data
->
base
+
COMBINER_INT_STATUS
);
spin_unlock
(
&
irq_controller_lock
);
status
&=
chip_data
->
irq_mask
;
if
(
status
==
0
)
goto
out
;
...
...
@@ -104,10 +106,12 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
combiner_data
[
combiner_nr
].
base
=
base
;
combiner_data
[
combiner_nr
].
irq_offset
=
irq_start
;
combiner_data
[
combiner_nr
].
irq_mask
=
0xff
<<
((
combiner_nr
%
4
)
<<
3
);
/* Disable all interrupts */
__raw_writel
(
0xffffffff
,
base
+
COMBINER_ENABLE_CLEAR
);
__raw_writel
(
combiner_data
[
combiner_nr
].
irq_mask
,
base
+
COMBINER_ENABLE_CLEAR
);
/* Setup the Linux IRQ subsystem */
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment