Commit fbb8bb83 authored by Tony Lindgren's avatar Tony Lindgren

ARM: dts: Configure omap4 rng to probe with ti-sysc

Add RNG interconnect data for omap4 similar to what dra7 has. The
clock is OMAP4_CM_L4SEC_RNG_CLKCTRL_OFFSET at offset address 0x01c0,
which matches what dra7 also has with DRA7_L4SEC_CLKCTRL_INDEX(0x1c0).

Note that we need to also add the related l4_secure clock entries.
I've only added RNG, the others can be added as they get tested.
They are probably very similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs[].

With the clock tagged CLKF_SOC_NONSEC, clock is set disabled for secure
devices and clk_get() will fail. Additionally we disable the RNG target
module on droid4 to avoid introducing new boot time warnings.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 723a567f
...@@ -650,6 +650,11 @@ OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3) ...@@ -650,6 +650,11 @@ OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
}; };
}; };
/* RNG is used by secure mode and not accessible */
&rng_target {
status = "disabled";
};
/* Configure pwm clock source for timers 8 & 9 */ /* Configure pwm clock source for timers 8 & 9 */
&timer8 { &timer8 {
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
......
...@@ -2002,12 +2002,26 @@ timer11: timer@0 { ...@@ -2002,12 +2002,26 @@ timer11: timer@0 {
}; };
}; };
target-module@90000 { /* 0x48090000, ap 57 2a.0 */ rng_target: target-module@90000 { /* 0x48090000, ap 57 2a.0 */
compatible = "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
status = "disabled"; reg = <0x91fe0 0x4>,
<0x91fe4 0x4>;
reg-names = "rev", "sysc";
ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>;
/* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
clocks = <&l4_secure_clkctrl OMAP4_RNG_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x0 0x90000 0x2000>; ranges = <0x0 0x90000 0x2000>;
rng: rng@0 {
compatible = "ti,omap4-rng";
reg = <0x0 0x2000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
};
}; };
target-module@96000 { /* 0x48096000, ap 37 26.0 */ target-module@96000 { /* 0x48096000, ap 37 26.0 */
......
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