Commit fc331460 authored by Avinash Patil's avatar Avinash Patil Committed by John W. Linville

mwifiex: use pci_alloc/free_consistent APIs for PCIe

This patch uses pci_alloc_consistent and pci_free_consistent
APIs for mwifiex_pcie driver. Consistent DMA memory is allocated
for TX, RX and event rings. Command buffer and command response
buffer also uses map/unmap memory APIs to download commands and
get command responses.
Signed-off-by: default avatarAvinash Patil <patila@marvell.com>
Signed-off-by: default avatarBing Zhao <bzhao@marvell.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent c6d1d87a
This diff is collapsed.
...@@ -118,7 +118,7 @@ struct pcie_service_card { ...@@ -118,7 +118,7 @@ struct pcie_service_card {
u32 txbd_rdptr; u32 txbd_rdptr;
u32 txbd_ring_size; u32 txbd_ring_size;
u8 *txbd_ring_vbase; u8 *txbd_ring_vbase;
phys_addr_t txbd_ring_pbase; dma_addr_t txbd_ring_pbase;
struct mwifiex_pcie_buf_desc *txbd_ring[MWIFIEX_MAX_TXRX_BD]; struct mwifiex_pcie_buf_desc *txbd_ring[MWIFIEX_MAX_TXRX_BD];
struct sk_buff *tx_buf_list[MWIFIEX_MAX_TXRX_BD]; struct sk_buff *tx_buf_list[MWIFIEX_MAX_TXRX_BD];
...@@ -126,7 +126,7 @@ struct pcie_service_card { ...@@ -126,7 +126,7 @@ struct pcie_service_card {
u32 rxbd_rdptr; u32 rxbd_rdptr;
u32 rxbd_ring_size; u32 rxbd_ring_size;
u8 *rxbd_ring_vbase; u8 *rxbd_ring_vbase;
phys_addr_t rxbd_ring_pbase; dma_addr_t rxbd_ring_pbase;
struct mwifiex_pcie_buf_desc *rxbd_ring[MWIFIEX_MAX_TXRX_BD]; struct mwifiex_pcie_buf_desc *rxbd_ring[MWIFIEX_MAX_TXRX_BD];
struct sk_buff *rx_buf_list[MWIFIEX_MAX_TXRX_BD]; struct sk_buff *rx_buf_list[MWIFIEX_MAX_TXRX_BD];
...@@ -134,13 +134,14 @@ struct pcie_service_card { ...@@ -134,13 +134,14 @@ struct pcie_service_card {
u32 evtbd_rdptr; u32 evtbd_rdptr;
u32 evtbd_ring_size; u32 evtbd_ring_size;
u8 *evtbd_ring_vbase; u8 *evtbd_ring_vbase;
phys_addr_t evtbd_ring_pbase; dma_addr_t evtbd_ring_pbase;
struct mwifiex_pcie_buf_desc *evtbd_ring[MWIFIEX_MAX_EVT_BD]; struct mwifiex_pcie_buf_desc *evtbd_ring[MWIFIEX_MAX_EVT_BD];
struct sk_buff *evt_buf_list[MWIFIEX_MAX_EVT_BD]; struct sk_buff *evt_buf_list[MWIFIEX_MAX_EVT_BD];
struct sk_buff *cmd_buf; struct sk_buff *cmd_buf;
struct sk_buff *cmdrsp_buf; struct sk_buff *cmdrsp_buf;
struct sk_buff *sleep_cookie; u8 *sleep_cookie_vbase;
dma_addr_t sleep_cookie_pbase;
void __iomem *pci_mmap; void __iomem *pci_mmap;
void __iomem *pci_mmap1; void __iomem *pci_mmap1;
}; };
......
...@@ -931,7 +931,6 @@ mwifiex_cmd_pcie_host_spec(struct mwifiex_private *priv, ...@@ -931,7 +931,6 @@ mwifiex_cmd_pcie_host_spec(struct mwifiex_private *priv,
struct host_cmd_ds_pcie_details *host_spec = struct host_cmd_ds_pcie_details *host_spec =
&cmd->params.pcie_host_spec; &cmd->params.pcie_host_spec;
struct pcie_service_card *card = priv->adapter->card; struct pcie_service_card *card = priv->adapter->card;
phys_addr_t *buf_pa;
cmd->command = cpu_to_le16(HostCmd_CMD_PCIE_DESC_DETAILS); cmd->command = cpu_to_le16(HostCmd_CMD_PCIE_DESC_DETAILS);
cmd->size = cpu_to_le16(sizeof(struct cmd->size = cpu_to_le16(sizeof(struct
...@@ -953,10 +952,11 @@ mwifiex_cmd_pcie_host_spec(struct mwifiex_private *priv, ...@@ -953,10 +952,11 @@ mwifiex_cmd_pcie_host_spec(struct mwifiex_private *priv,
host_spec->evtbd_addr_lo = (u32)(card->evtbd_ring_pbase); host_spec->evtbd_addr_lo = (u32)(card->evtbd_ring_pbase);
host_spec->evtbd_addr_hi = (u32)(((u64)card->evtbd_ring_pbase)>>32); host_spec->evtbd_addr_hi = (u32)(((u64)card->evtbd_ring_pbase)>>32);
host_spec->evtbd_count = MWIFIEX_MAX_EVT_BD; host_spec->evtbd_count = MWIFIEX_MAX_EVT_BD;
if (card->sleep_cookie) { if (card->sleep_cookie_vbase) {
buf_pa = MWIFIEX_SKB_PACB(card->sleep_cookie); host_spec->sleep_cookie_addr_lo =
host_spec->sleep_cookie_addr_lo = (u32) *buf_pa; (u32)(card->sleep_cookie_pbase);
host_spec->sleep_cookie_addr_hi = (u32) (((u64)*buf_pa) >> 32); host_spec->sleep_cookie_addr_hi =
(u32)(((u64)(card->sleep_cookie_pbase)) >> 32);
dev_dbg(priv->adapter->dev, "sleep_cook_lo phy addr: 0x%x\n", dev_dbg(priv->adapter->dev, "sleep_cook_lo phy addr: 0x%x\n",
host_spec->sleep_cookie_addr_lo); host_spec->sleep_cookie_addr_lo);
} }
......
...@@ -22,16 +22,16 @@ ...@@ -22,16 +22,16 @@
static inline struct mwifiex_rxinfo *MWIFIEX_SKB_RXCB(struct sk_buff *skb) static inline struct mwifiex_rxinfo *MWIFIEX_SKB_RXCB(struct sk_buff *skb)
{ {
return (struct mwifiex_rxinfo *)(skb->cb + sizeof(phys_addr_t)); return (struct mwifiex_rxinfo *)(skb->cb + sizeof(dma_addr_t));
} }
static inline struct mwifiex_txinfo *MWIFIEX_SKB_TXCB(struct sk_buff *skb) static inline struct mwifiex_txinfo *MWIFIEX_SKB_TXCB(struct sk_buff *skb)
{ {
return (struct mwifiex_txinfo *)(skb->cb + sizeof(phys_addr_t)); return (struct mwifiex_txinfo *)(skb->cb + sizeof(dma_addr_t));
} }
static inline phys_addr_t *MWIFIEX_SKB_PACB(struct sk_buff *skb) static inline void MWIFIEX_SKB_PACB(struct sk_buff *skb, dma_addr_t *buf_pa)
{ {
return (phys_addr_t *)skb->cb; memcpy(buf_pa, skb->cb, sizeof(dma_addr_t));
} }
#endif /* !_MWIFIEX_UTIL_H_ */ #endif /* !_MWIFIEX_UTIL_H_ */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment