Commit fc69009e authored by Mikita Lipski's avatar Mikita Lipski Committed by Alex Deucher

drm/amd/display: Allow clock sharing b/w HDMI and DVI

[why]
HDMI and DVI share the same PHY clock and single link
DVI and HDMI both use 4 lanes, so they should be allowed
to be sharing the same clock source if all other parameters
are satisfied.

[how]
Change a check for general DVI to Dual DVI.
Signed-off-by: default avatarMikita Lipski <mikita.lipski@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7cb52855
...@@ -372,11 +372,11 @@ static bool is_sharable_clk_src( ...@@ -372,11 +372,11 @@ static bool is_sharable_clk_src(
return false; return false;
if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal) if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
&& dc_is_dvi_signal(pipe->stream->signal)) && dc_is_dual_link_signal(pipe->stream->signal))
return false; return false;
if (dc_is_hdmi_signal(pipe->stream->signal) if (dc_is_hdmi_signal(pipe->stream->signal)
&& dc_is_dvi_signal(pipe_with_clk_src->stream->signal)) && dc_is_dual_link_signal(pipe_with_clk_src->stream->signal))
return false; return false;
if (!resource_are_streams_timing_synchronizable( if (!resource_are_streams_timing_synchronizable(
......
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