Commit fe4fbdbc authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Will Deacon

arm64: cpufeature: Track user visible fields

Track the user visible fields of a CPU feature register. This will be
used for exposing the value to the userspace. All the user visible
fields of a feature register will be passed on as it is, while the
others would be filled with their respective safe value.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 8c2dcbd2
...@@ -55,8 +55,12 @@ enum ftr_type { ...@@ -55,8 +55,12 @@ enum ftr_type {
#define FTR_SIGNED true /* Value should be treated as signed */ #define FTR_SIGNED true /* Value should be treated as signed */
#define FTR_UNSIGNED false /* Value should be treated as unsigned */ #define FTR_UNSIGNED false /* Value should be treated as unsigned */
#define FTR_VISIBLE true /* Feature visible to the user space */
#define FTR_HIDDEN false /* Feature is hidden from the user */
struct arm64_ftr_bits { struct arm64_ftr_bits {
bool sign; /* Value is signed ? */ bool sign; /* Value is signed ? */
bool visible;
bool strict; /* CPU Sanity check: strict matching required ? */ bool strict; /* CPU Sanity check: strict matching required ? */
enum ftr_type type; enum ftr_type type;
u8 shift; u8 shift;
...@@ -72,7 +76,9 @@ struct arm64_ftr_bits { ...@@ -72,7 +76,9 @@ struct arm64_ftr_bits {
struct arm64_ftr_reg { struct arm64_ftr_reg {
const char *name; const char *name;
u64 strict_mask; u64 strict_mask;
u64 user_mask;
u64 sys_val; u64 sys_val;
u64 user_val;
const struct arm64_ftr_bits *ftr_bits; const struct arm64_ftr_bits *ftr_bits;
}; };
...@@ -172,6 +178,11 @@ static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp) ...@@ -172,6 +178,11 @@ static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp)
return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
} }
static inline u64 arm64_ftr_reg_user_value(const struct arm64_ftr_reg *reg)
{
return (reg->user_val | (reg->sys_val & reg->user_mask));
}
static inline int __attribute_const__ static inline int __attribute_const__
cpuid_feature_extract_field(u64 features, int field, bool sign) cpuid_feature_extract_field(u64 features, int field, bool sign)
{ {
......
This diff is collapsed.
...@@ -496,7 +496,7 @@ static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) ...@@ -496,7 +496,7 @@ static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
{ {
int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
regs->regs[rt] = arm64_ftr_reg_ctrel0.sys_val; regs->regs[rt] = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
regs->pc += 4; regs->pc += 4;
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment