- 30 Mar, 2017 40 commits
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Alex Deucher authored
Everything we need is in the ring structure. No need to pass all the bits explicitly. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
It's required. Reviewed-by:
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Alex Deucher authored
No need to loop through the compute queues twice. Reviewed-by:
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Alex Deucher authored
If KIQ isn't working, the compute rings won't work either. Reviewed-by:
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Alex Deucher authored
It's required. Reviewed-by:
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Alex Deucher authored
To better match where they are used. Called from sw_init and sw_fini. Reviewed-by:
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Alex Deucher authored
Reviewed-by:
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Rex Zhu authored
load mc ucode in driver if VBIOS not loaded a full version of MC ucode, Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
jimqu <Jim.Qu@amd.com> Signed-off-by:
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Chunming Zhou authored
it could come from branch merge. Signed-off-by:
Chunming Zhou <David1.Zhou@amd.com> Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Rex Zhu authored
Signed-off-by:
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Rex Zhu authored
the ixcurrent_pg_status addr is different between APU and DGPU. Signed-off-by:
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Eric Huang authored
Signed-off-by:
Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by:
Samuel Li <Samuel.Li@amd.com> Signed-off-by:
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Tom St Denis authored
Forces VCE/UVD off during late init to ensure they're powered off correctly during boot. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Colin Ian King authored
The outer loop is redundant and can be removed as it is doing nothing useful. Also remove some commented out code that is not being used. Detected by CoverityScan, CID#1402073 Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Chunming Zhou authored
big number is to high priority. Signed-off-by:
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Alex Deucher authored
Reviewed-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by:
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Junwei Zhang authored
If the before mapping is 1 page size, so its start and last will be same. Thus below condition will become false, then to free the before mapping. > if (before->it.start != before->it.last) But in this case, we need the before mapping of 1 page size. So does after mapping. Signed-off-by:
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Christian König authored
Add a new operation to replace mappings in a VM with a new one. v2: Fix Jerry's comment, separate out clear operation. Signed-off-by:
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Christian König authored
A new VM operation to remove all mappings in a range. v2: limit unmapped area as noted by Jerry Signed-off-by:
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Christian König authored
This makes it easier to implement a replace operation. Signed-off-by:
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Christian König authored
PRT support is completely implemented now and we left it turned on accidentially in the error path. Signed-off-by:
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Alex Deucher authored
Reviewed-by:
Emil Velikov <emil.l.velikov@gmail.com> Reported-by:
David Binderman <dcb314@hotmail.com> Signed-off-by:
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Alex Deucher authored
GFX_MGLS was added twice. Reviewed-by:
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Andrew F. Davis authored
Found with scripts/coccinelle/misc/boolconv.cocci. Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
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Andrew F. Davis authored
Found with scripts/coccinelle/misc/boolconv.cocci. Signed-off-by:
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Andres Rodriguez authored
This helps de-duplicate a long expression and removes overly long lines. v2: Rename macro and undef it Reviewed-by:
Andres Rodriguez <andresx7@gmail.com> Signed-off-by:
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Andres Rodriguez authored
Fence data is easier to read and allows us to correlate to identify corresponding dma_fence ftrace events. Reviewed-by:
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Andres Rodriguez authored
Remove pointers which provide redundant information which is already easier to deduce from other fields. Reviewed-by:
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Andres Rodriguez authored
Pointers get reallocated and they are hard to read for humans. Use ids instead. Reviewed-by:
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Andres Rodriguez authored
Consistent formatting makes it easier to read the logs and apply simple awk oneliners. I missed some of these on my last patch. Reviewed-by:
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Andres Rodriguez authored
A unique id is useful for debugging and tracing. Intended to replace pointers in ftrace output. Reviewed-by:
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Roger.He authored
We originally limited the IH to 4k on tonga since it uses bus addresses directly rather than GPU MC addresses, so it needs contigous physical memory. This brings it inline with other asics. Signed-off-by:
Roger.He <Hongbo.He@amd.com> Acked-by:
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Alex Deucher authored
SI cards don't expose GDS as a separate pool. The CP manages GDS and the UMDs use special CP packets to allocate GDS memory. v2: drop extra whitespace change bug: https://bugzilla.kernel.org/show_bug.cgi?id=194867Reviewed-by:
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Alex Deucher authored
Leftover from gfx7 code. gfx6 never sets up the gds buffers in the first place. Reviewed-by:
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Rex Zhu authored
fix logic error in hw_fini and set_clockgating_state functions. Signed-off-by:
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Rex Zhu authored
start vce first then enable vce dpm. Signed-off-by:
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Alex Deucher authored
Used for fetching external GPU information. Signed-off-by: -
Alex Deucher authored
Used for fetching external GPU information. Signed-off-by: -
Leo Liu authored
Reviewed-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
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Leo Liu authored
Reviewed-by:
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