- 17 Dec, 2018 40 commits
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Ulf Hansson authored
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Ulf Hansson authored
Some eMMCs from Micron have been reported to need ~800 ms timeout, while enabling the CACHE ctrl after running sudden power failure tests. The needed timeout is greater than what the card specifies as its generic CMD6 timeout, through the EXT_CSD register, hence the problem. Normally we would introduce a card quirk to extend the timeout for these specific Micron cards. However, due to the rather complicated debug process needed to find out the error, let's simply use a minimum timeout of 1600ms, the double of what has been reported, for all cards when enabling CACHE ctrl. Reported-by:
Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reported-by:
Andreas Dannenberg <dannenberg@ti.com> Reported-by:
Faiz Abbas <faiz_abbas@ti.com> Cc: <stable@vger.kernel.org> Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Ulf Hansson authored
In commit 5320226a ("mmc: core: Disable HPI for certain Hynix eMMC cards"), then intent was to prevent HPI from being used for some eMMC cards, which didn't properly support it. However, that went too far, as even BKOPS and CACHE ctrl became prevented. Let's restore those parts and allow BKOPS and CACHE ctrl even if HPI isn't supported. Fixes: 5320226a ("mmc: core: Disable HPI for certain Hynix eMMC cards") Cc: Pratibhasagar V <pratibha@codeaurora.org> Cc: <stable@vger.kernel.org> Signed-off-by:
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Ulf Hansson authored
During a re-initialization of the eMMC card, we may fail to re-enable HPI. In these cases, that isn't properly reflected in the card->ext_csd.hpi_en bit, as it keeps being set. This may cause following attempts to use HPI, even if's not enabled. Let's fix this! Fixes: eb0d8f13 ("mmc: core: support HPI send command") Cc: <stable@vger.kernel.org> Signed-off-by:
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Russell King authored
While booting with rootfs on MMC, the following warning is encountered on OMAP4430: omap-dma-engine 4a056000.dma-controller: DMA-API: mapping sg segment longer than device claims to support [len=69632] [max=65536] This is because the DMA engine has a default maximum segment size of 64K but HSMMC sets: mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; mmc->max_seg_size = mmc->max_req_size; which ends up telling the block layer that we support a maximum segment size of 65535*512, which exceeds the advertised DMA engine capabilities. Fix this by clamping the maximum segment size to the lower of the maximum request size and of the DMA engine device used for either DMA channel. Signed-off-by:Russell King <rmk+kernel@armlinux.org.uk> Cc: <stable@vger.kernel.org> Signed-off-by:
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Sowjanya Komatineni authored
Some of the SDMMC pads auto calibration values parsed from devicetree are assigned incorrectly. This patch fixes it. Signed-off-by:
Sowjanya Komatineni <skomatineni@nvidia.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Acked-by:
Thierry Reding <treding@nvidia.com> Fixes: 51b77c8e ("mmc: tegra: Program pad autocal offsets from dt") Signed-off-by:
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Sowjanya Komatineni authored
V4_MODE is Bit-15 of SDHCI_HOST_CONTROL2 register. Need to perform word access to this register. Signed-off-by:
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Faiz Abbas authored
Errata i929 in certain OMAP5/DRA7XX/AM57XX silicon revisions (SPRZ426D - November 2014 - Revised February 2018 [1]) mentions unexpected tuning pattern errors. A small failure band may be present in the tuning range which may be missed by the current algorithm. Furthermore, the failure bands vary with temperature leading to different optimum tuning values for different temperatures. As suggested in the related Application Report (SPRACA9B - October 2017 - Revised July 2018 [2]), tuning should be done in two stages. In stage 1, assign the optimum ratio in the maximum pass window for the current temperature. In stage 2, if the chosen value is close to the small failure band, move away from it in the appropriate direction. References: [1] http://www.ti.com/lit/pdf/sprz426 [2] http://www.ti.com/lit/pdf/SPRACA9Signed-off-by:
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Faiz Abbas authored
The driver fetches a thermal zone using the string "cpu_thermal" for tuning operation. Add a note for the same. Signed-off-by:
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Adrian Hunter authored
Intel BYT-based controllers do not have a LED signal line. Nevertheless sdhci_led_control() takes more than twice as long as sdhci_send_command(), even though it does nothing. Use the new SDHCI_QUIRK_NO_LED quirk to disable LED control for Intel BYT-based controllers. Signed-off-by:
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Adrian Hunter authored
Intel BYT-based controllers do not have a LED signal line. Nevertheless sdhci_led_control() takes more than twice as long as sdhci_send_command(), even though it does nothing. Use the new SDHCI_QUIRK_NO_LED quirk to disable LED control for Intel BYT-based controllers. Signed-off-by:
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Adrian Hunter authored
Host controllers may not have a LED signal line, whereas the register updates to control the non-existent LED can be relatively time consuming. Add a quirk to disable LED control. Signed-off-by:
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Ludovic Barre authored
On cmd12 (STOP_TRANSMISSION), STM32 sdmmc variant needs to set cmdstop bit in command register. The CPSM ("Command Path State Machine") treats the command as a Stop Transmission command and signals abort to the DPSM ("Data Path State Machine"). Signed-off-by:Ludovic Barre <ludovic.barre@st.com> Signed-off-by:
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Colin Ian King authored
There are spelling mistakes in a couple of dev_dbg messages, fix these. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Reviewed-by:
Oleksij Rempel <linux@rempel-privat.de> Signed-off-by:
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Jerome Brunet authored
With some eMMC devices, there is still issues with the new phase settings. Enabling signal resampling seems to solve the problem for these. Signed-off-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
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Jerome Brunet authored
Align the default Core and Tx phase with the SoC vendor tree. Even if the Tx phase is different from what the documentation recommends, it seems to provide better results. Signed-off-by:
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Jerome Brunet authored
The spinlock is only used within the irq handler so it does not seem very useful. Signed-off-by:
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Jerome Brunet authored
On errors, if we don't stop the descriptor chain, it may continue to run and raise IRQ after we have called mmc_request_done(). This is bad because we won't be able to get cmd anymore and properly deal with the IRQ. This patch makes sure the descriptor chain is stopped before calling mmc_request_done() Fixes: 79ed05e3 ("mmc: meson-gx: add support for descriptor chain mode") Signed-off-by:
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Faiz Abbas authored
The host controllers on TI's AM654 SOCs are not compatible with the phy and consumer model of the sdhci-of-arasan driver. It turns out that for optimal operation at higher speeds, a special tuning procedure needs to be implemented which involves configuration of platform specific phy registers. Therefore, branch out to a new sdhci_am654 driver and add the phy register space with all phy configurations to it. Populate AM654 specific callbacks to sdhci_ops and add SDHCI_QUIRKS wherever applicable. Only add support for upto High Speed for SD card and upto DDR52 speed mode for eMMC. Higher speeds will be added in subsequent patches. Signed-off-by:
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Faiz Abbas authored
Commit 26a4f38d ("dt-bindings: mmc: sdhci-of-arasan: Add new compatible for AM654 MMC PHY") added a new compatible for supporting controllers on TI's AM65x SOCs. It turns out that the controller is not compatible with the arasan driver's phy and consumer model as it requires some phy registers for core sdhci functionality. This calls for the binding to branch out to a new driver. Therefore, add a deprecated message for the ti,am654-sdhci-5.1 binding. Signed-off-by:
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Faiz Abbas authored
Add binding documentation for mmc host controllers present on TI's AM654 SOCs. Signed-off-by:
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Arnd Bergmann authored
The newly added sdhci_msm_restore_sdr_dll_config() function is only called if CONFIG_PM is enabled: drivers/mmc/host/sdhci-msm.c:1050:12: error: 'sdhci_msm_restore_sdr_dll_config' defined but not used [-Werror=unused-function] Better remove the incorrect #ifdef altogether and just use __maybe_unused, which is harder to get wrong. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
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Adrian Hunter authored
Always check the wait condition before returning timeout. Signed-off-by:
Zhoujie Wu <zjwu@marvell.com> Signed-off-by:
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Adrian Hunter authored
Always check the wait condition before returning timeout. Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by:
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Adrian Hunter authored
Always check the wait condition before returning timeout. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by:
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/mmc/host/alcor.c: In function 'alcor_data_set_dma': drivers/mmc/host/alcor.c:124:12: warning: variable 'len' set but not used [-Wunused-but-set-variable] drivers/mmc/host/alcor.c:648:15: warning: variable 'clock_out' set but not used [-Wunused-but-set-variable] Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Reviewed-by:
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Linus Walleij authored
I managed to put the ifdef/else statements wrong when registering the GPIO descriptor table for MMC CD/WP. Fixing it up! Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Fixes: babd0b238d11 ("mmc: host: tmio: Use GPIO descriptors") Signed-off-by:Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Colin Ian King authored
There is a spelling mistake in a pr_warn message, fix it. Signed-off-by:
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Kai-Heng Feng authored
In order to let host's parent device, rtsx_usb, to use USB remote wake up signaling to do card detection, it needs to be suspended. Hence it's necessary to add runtime PM support for the memstick host. To keep memstick host stays suspended when it's not in use, convert the card detection function from kthread to delayed_work, which can be scheduled when the host is resumed and can be canceled when the host is suspended. Put the device to suspend when there's no card and the power mode is MEMSTICK_POWER_OFF. Signed-off-by:
Kai-Heng Feng <kai.heng.feng@canonical.com> Tested-by:
Oleksandr Natalenko <oleksandr@natalenko.name> Signed-off-by:
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Kai-Heng Feng authored
Use ms_dev() helper for consistency. Signed-off-by:
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Kai-Heng Feng authored
We can use MEMSTICK_POWER_{ON,OFF} along with pm_runtime_{get,put} helpers to let memstick host support runtime pm. The rpm count may go down to zero before the memstick host powers on, so the host can be runtime suspended. So before doing card detection, increment the rpm count to avoid the host gets runtime suspended. Balance the rpm count after card detection is done. Signed-off-by: -
Kai-Heng Feng authored
Although rtsx_usb doesn't support card removal detection, card insertion will resume rtsx_usb by USB remote wakeup signaling. When rtsx_usb gets resumed, also resumes its child devices, rtsx_usb_sdmmc and rtsx_usb_ms, to notify them there's a card in its slot. Signed-off-by:
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Kai-Heng Feng authored
If the probe fails, we should use pm_runtime_disable() to balance pm_runtime_enable(). Add missing pm_runtime_disable() for rtsx_usb_ms. Signed-off-by:
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Ulf Hansson authored
The rtsx USB parent device, has logic to detect when a card is inserted into the card slot. Although, the logic can't detect when a card is removed. This makes things a bit tricky, which is why the current method is simply to turn on MMC_CAP_NEEDS_POLL during probe. Using MMC_CAP_NEEDS_POLL means lots of energy being wasted, as the mmc host becomes runtime resumed frequently by the mmc core, while it polls for new cards being inserted. To address this problem, let's start relying on that the rtsx USB driver runtime resumes its child device, which is the rtsx_usb_sdmmc device, when it detects that a new card being inserted. This means dropping MMC_CAP_NEEDS_POLL from being set during probe. Instead let's implement a ->runtime_resume() callback to schedule a detect work and to set MMC_CAP_NEEDS_POLL. In this way, polling is enabled as long as there is card inserted, thus we can rely on the mmc core to detect also when the card becomes removed. Furthermore, to avoid polling forever after a card has been removed, let's implement a ->runtime_suspend() callback and make it clear MMC_CAP_NEEDS_POLL. Signed-off-by:
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Ulf Hansson authored
The current implementation uses the runtime PM autosuspend feature with a default timeout set to 50ms. This really doesn't makes sense, as it's a USB driven host device, which needs it rtsx USB device (parent device) to be runtime resumed to provide power to the card. In practise, using the autosuspend or any async runtime PM suspend method, means unnecessary delaying the host device and thus the parent, to be runtime suspended when a card is removed/powered off. For this reasons, let's simply drop the support for runtime PM autosuspend and tell the mmc core to use synced runtime PM suspend methods, via setting MMC_CAP_SYNC_RUNTIME_PM during probe. Moreover, as the mmc core nowadays deploys runtime PM reference counting of the mmc host device, convert ->set_ios() to use the more lightweight pm_runtime_get_noresume() and pm_runtime_put_noidle() APIs. Signed-off-by:
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Ulf Hansson authored
In case the card has been powered off, it seems silly to continue to allow the led to be updated. Instead let's forbid that, as it enables us to prevent runtime resuming the device and thus avoids wasting energy. Signed-off-by:
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Ulf Hansson authored
To allow mmc host drivers to inform the mmc core about rather using pm_runtime_put_sync_suspend() instead of pm_runtime_put_autosuspend(), let's introduce MMC_CAP_SYNC_RUNTIME_PM. This is especially useful for those mmc host drivers that don't benefit from using the runtime PM autosuspend feature. Typically this is those that relies on parent devices to power the card via runtime PM, like some USB host drivers for example. Signed-off-by:
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Loic Poulain authored
The Clock Data Recovery (CDR) circuit allows to automatically adjust the RX sampling-point/phase for high frequency cards (SDR104, HS200...). CDR is automatically enabled during DLL configuration. However, according to the APQ8016 reference manual, this function must be disabled during TX and tuning phase in order to prevent any interferences during tuning challenges and unexpected phase alteration during TX transfers. This patch enables/disables CDR according to the current transfer mode. This fixes sporadic write transfer issues observed with some SDR104 and HS200 cards. Inspired by sdhci-msm downstream patch: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/432516/Reported-by:
Leonid Segal <leonid.s@variscite.com> Reported-by:
Manabu Igusa <migusa@arrowjapan.com> Signed-off-by:
Loic Poulain <loic.poulain@linaro.org> Acked-by:
Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by:
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Oleksij Rempel authored
This driver provides support for Alcor Micro AU6601 and AU6621 SD/MMC controller. Signed-off-by:
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Oleksij Rempel authored
This driver provides support for Alcor Micro AU6601 and AU6621 card readers. This is single LUN HW and it is expected to work with following standards: - Support SDR104 / SDR50 - MultiMedia Card (MMC) - Memory Stick (MS) - Memory Stick PRO (MS_Pro) Since it is a PCIe controller, it should work on any architecture supporting PCIe. For now, it was developed and tested only on x86_64. This driver is a result of RE work and was created without any documentation or real knowledge of HW internals. Signed-off-by:
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