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- 25 Sep, 2004 1 commit
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Russell King authored
The recent addition of linux/bitops.h inside linux/kernel.h has created a circular dependency: asm/system.h -> linux/kernel.h -> linux/bitops.h -> asm/bitops.h -> asm/system.h which results in an unbuildable kernel. We appear not to need linux/kernel.h in asm/system.h, but do need linux/linkage.h, so make this the case.
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- 07 Sep, 2004 1 commit
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Russell King authored
Add cache_is_xxxx() functions so we can easily identify the cache type of the CPU we're running on.
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- 24 May, 2004 1 commit
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Russell King authored
Disabling IRQs over context switches causes unreasonable IRQ latency on VIVT cached machines, so provide our own prepare_arch_switch(), finish_arch_switch() and task_running() implementations. We provide an optimised UP version so we don't end up needlessly incrementing and decrementing the preempt count.
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- 28 Apr, 2004 2 commits
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Russell King authored
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Russell King authored
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- 23 Apr, 2004 1 commit
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Nicolas Pitre authored
Patch from Nicolas Pitre The recent discovery of a problem with gcc not always respecting register assignment for local variables to be used with inline assembly is worrisome. If unnoticed, such problems can cover bugs that might prove hard to find especially when the code is right but silently ignored. This patch adds a test where needed to have the assembler confirm our register selection and fail the kernel build if the wrong registers are allocated.
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- 15 Mar, 2004 1 commit
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Russell King authored
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- 26 Feb, 2004 1 commit
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Russell King authored
This cset adds support ARM architecture version 6.
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- 16 Sep, 2003 1 commit
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Russell King authored
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- 03 Sep, 2003 1 commit
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Russell King authored
This removes include/asm-arm/proc-armv entirely, merging the contents into the relevant include files in include/asm-arm. We also update various files in arch/arm which reference definitions in the now non-existent directory.
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- 14 Aug, 2003 1 commit
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Russell King authored
- Add section descriptor bit definitions. - Add control register bit definitions. - Add architecture number.
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- 26 Mar, 2003 1 commit
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Russell King authored
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- 06 Mar, 2003 2 commits
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Russell King authored
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Russell King authored
Eliminate have_isa_bridge - use isa_bridge instead. Clean up PCI bus walking. Clean up detection of fast back to back capability. Ensure we set the bridge control register appropriately. Pin swizzle functions are never called with pin == 0.
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- 30 Oct, 2002 1 commit
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Russell King authored
Remove run-time special casing of L1 page table permissions/cache/ control bits; instead set up the bits once at boot time.
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- 18 Oct, 2002 2 commits
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Dipankar Sarma authored
This first RCU helper patch adds a read_barrier_depends() primitive to all archs which is NOP for archs that doesn't require an rmb() for data dependent reads when writes are ordered using a wmb(). In reality, only alpha requires an rmb(), the rest are NOPs. It is likely to be necessary in most situations that would use RCU. Please apply. Description : Sometime ago, during a discussion on lock-free lookups, it was agreed that an additional memory barrier interface, read_barrier_depends() that is lighter than an rmb(), is necessary to make sure that data-dependent reads are not re-ordered over this barrier. For many processors, data-dependency enforces order, so this interface is a NOP, but for those that don't (like alpha), it can be a rmb(). For example, the following code would force ordering (the initial value of "a" is zero, "b" is one, and "p" is "&a"): CPU 0 CPU 1 b = 2; memory_barrier(); p = &b; q = p; read_barrier_depends(); d = *q; because the read of "*q" depends on the read of "p" and these two reads should be separated by a read_barrier_depends(). However, the following code, with the same initial values for "a" and "b": CPU 0 CPU 1 a = 2; memory_barrier(); b = 3; y = b; read_barrier_depends(); x = a; does not enforce ordering, since there is no data dependency between the read of "a" and the read of "b". Therefore, on some CPUs, such as Alpha, "y" could be set to 3 and "x" to 0. rmb() needs to be used here, not read_barrier_depends(). The original discussion can be found at - http://marc.theaimsgroup.com/?t=100259422200002&r=1&w=2 Explanation of the need for read_barrier_depends() can be found at http://lse.sf.net/locking/wmbdd.html
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Russell King authored
This fixes the UP set_task_state and set_current_state in 2.5.43 to ensure that we don't re-order loads around the store for setting task->state. This patch is from Nicolas Pitre, nico@cam.org (As a side note - 2.4.10 also contains the same problem, but 2.2 contain the memory barrier.)
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- 29 Sep, 2002 1 commit
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Russell King authored
Update for changes in mainline 2.5.3[01234].
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- 27 Jul, 2002 2 commits
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Russell King authored
These macros are no longer required; the generic versions defined in sched.c are sufficient for ARM.
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Russell King authored
Replace local_save_flags_cli with local_irq_save. Remove duplicate cli, sti, save_flags and restore_flags definitions.
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- 22 Jul, 2002 1 commit
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Ingo Molnar authored
Make people use the proper cli/sti replacements
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- 09 Jul, 2002 1 commit
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Russell King authored
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- 05 Jun, 2002 1 commit
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Russell King authored
Provide a method where various other parts of the kernel (eg, alignment fault handler, PCI subsystems, etc) can hook into the page fault processing to handle alignment and PCI faults respectively.
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- 13 Mar, 2002 1 commit
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Russell King authored
cleanups for ARM.
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- 25 Feb, 2002 1 commit
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Russell King authored
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- 20 Feb, 2002 1 commit
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Russell King authored
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- 05 Feb, 2002 1 commit
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Linus Torvalds authored
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