- 14 Mar, 2011 7 commits
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Tony Lindgren authored
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Ohad Ben-Cohen authored
The wl1271's irq line is completely controlled by the 1271 device, and the host does not not need to pull it up. While there's no functional effect, letting the host pull this line up is just redundant, and wastes power. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Aaro Koskinen authored
request_mem_region() error exit will leak ioremapped memory. Fix this by moving the ioremap() after request_mem_region(), which is the proper order to do this anyway. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Andy Green authored
This adapts the register offsets used to read the CPU DIE ID registers when run on 44XX so they match what is in the OMAP4430 Reference Manual page 269 Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Remove duplicate mux modes to make the binary smaller: text data bss dec hex filename 9378 24472 0 33850 843a mux44xx.o 9378 19104 0 28482 6f42 mux44xx.o Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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David Cohen authored
Currently IOVMM driver sets IOVMF_DA_FIXED/IOVMF_DA_ANON flags according to input 'da' address when mapping memory: da == 0: IOVMF_DA_ANON da != 0: IOVMF_DA_FIXED It prevents IOMMU to map first page with fixed 'da'. To avoid such issue, IOVMM will not automatically set IOVMF_DA_FIXED. It should now come from the user throught 'flags' parameter when mapping memory. As IOVMF_DA_ANON and IOVMF_DA_FIXED are mutually exclusive, IOVMF_DA_ANON can be removed. The driver will now check internally if IOVMF_DA_FIXED is set or not. Signed-off-by: David Cohen <dacohen@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Michael Jones authored
commit c7f4ab26 allowed mapping the NULL address if da_start==0, which would then not get unmapped. Disallow this again if IOVMF_DA_ANON is set. And spell variable 'alignment' correctly. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 11 Mar, 2011 21 commits
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Tony Lindgren authored
Fix compile when CONFIG_OMAP_MUX is not selected Signed-off-by: Tony Lindgren <tony@atomide.com>
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R Sricharan authored
Use the mux framework to initialise the serial pads. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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R Sricharan authored
Use the mux framework to initialise the serial pads. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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R Sricharan authored
Use the mux framework to initialise the serial pads. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Add macro for defining static pins in the board file. We can now start implementing pin multiplexing in the platform init code for devices that call omap_hwmod_mux_init. Currently that is only implemented for serial.c. Signed-off-by: Tony Lindgren <tony@atomide.com>
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R Sricharan authored
Currently OMAP_DEVICE_PAD_IDLE flag is used to mux pins dynamically. This can be simplified by using the enabled state variable of each pad. This also fixes the issue of the static pads not getting muxed after idling and disable/enable state transitions. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
This avoids going through the list unnecessarily when idling devices for runtime PM. Based on an earlier patch by sricharan <r.sricharan@ti.com>. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Merge branch 'for_2.6.39/pm-integration' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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Tony Lindgren authored
Merge branch 'integration-2.6.39-for-tony' of git://git.pwsan.com/linux-integration into omap-for-linus Conflicts: arch/arm/mach-omap2/pm34xx.c
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Jean Pihet authored
The patch adds the new power management trace points for the OMAP architecture. The trace points are for: - default idle handler. Since the cpuidle framework is instrumented in the generic way there is no need to add trace points in the OMAP specific cpuidle handler; - SoC clocks changes (enable, disable, set_rate), - power domain states: the desired target state and -if different- the actually hit state. Because of the generic nature of the changes, OMAP3 and OMAP4 are supported. Tested on OMAP3 with suspend/resume, cpuidle, basic DVFS. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Shweta Gulati authored
This Patch adds OPP enteries for IVA in OMAP4 OPP Table Tested on OMAP4430 SDP Board. Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Shweta Gulati authored
Update MPU, IVA and CORE voltage Rail values obtained from OMAP4430 Data Manual Operating Condition Addendum_v0.4. Tested on OMAP4430 SDP Board. Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Shweta Gulati authored
Almost all OMAP4 boards support OPP 800 MHz and OPP 1 GHz. Enable them in OPP Table. For small minority of boards which use OMAP4430-800 MHz device OPP 1GHz is not supported, OPP 1GHz should be disabled from board file. Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Vishwanath BS authored
Since all voltage data is now centralized in oppxxx_data.c, we can replace the values in the opp table with the macros used for voltage values. This will avoid opp table and voltage layer having conflicting values. Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
Conflicts: arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
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Paul Walmsley authored
Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c arch/arm/plat-omap/include/plat/omap_hwmod.h
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Paul Walmsley authored
Merge remote branches 'remotes/origin/pwrdm_clkdm_b_2.6.39', 'remotes/origin/pwrdm_add_can_lose_context_fns_2.6.39', 'remotes/origin/omap_device_a_2.6.39', 'remotes/origin/mmc_a_2.6.39', 'remotes/origin/hwmod_b_2.6.39', 'remotes/origin/dmtimer_a_2.6.39', 'remotes/origin/pwrdm_clkdm_a_2.6.39', 'remotes/origin/clkdm_statdep_omap4_2.6.39', 'remotes/origin/clk_a_2.6.39', 'remotes/origin/clk_autoidle_a_2.6.39', 'remotes/origin/clk_autoidle_b_2.6.39', 'remotes/origin/clk_b_2.6.39', 'remotes/origin/clk_clkdm_a_2.6.39', 'remotes/origin/misc_a_2.6.39', 'remotes/origin/for_2.6.39/omap3_hwmod_data' and 'remotes/origin/wdtimer_a_2.6.39' into tmp-integration-2.6.39-20110310-024
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Paul Walmsley authored
The HW superwised smart idle for wdtimer in OMAP3 prevents CORE power domain idle transitions. Disable it by swithing to SW supervised transitions. This could be a hardware bug in the OMAP3 wdtimer2 block. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
The omap_wdt should only be in full active state when the registers are being accessed. Otherwise the device can be on lower power mode. This patch is based on a patch created by Kalle Jokiniemi: https://patchwork.kernel.org/patch/618231/ which is itself based on a patch created by Atal Shargorodsky: http://lkml.org/lkml/2009/3/10/266. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com> Tested-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com> Cc: Wim Van Sebroeck <wim@iguana.be> Acked-by: Wim Van Sebroeck <wim@iguana.be> Acked-by: Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
This is a first pass at reorganizing mach-omap2/voltage.c: - Separate almost all of the data from the code of mach-omap2/voltage.c. The code remains in mach-omap2/voltage.c. The data goes into one of several places, depending on what type of data it is: - Silicon process/validation data: mach-omap2/opp*_data.c - VC (Voltage Controller) data: mach-omap2/vc*_data.c - VP (Voltage Processor) data: mach-omap2/vp*_data.c - Voltage domain data: mach-omap2/voltagedomains*_data.c The ultimate goal is for all this data to be autogenerated, the same way we autogenerate the rest of our data. - Separate VC and VP common data from VDD-specific VC and VP data. - Separate common voltage.c code from SoC-specific code; reuse common code. - Reorganize structures to avoid unnecessary memory loss due to unpacked fields. There is much left to be done. VC code and VP code should be separated out into vc*.c and vp*.c files. Many fields in the existing structures are superfluous, and should be removed. Some code in voltage.c seems to be duplicated; that code should be moved into functions of its own. Proper voltage domain code should be created, as was done with the powerdomain and clockdomains, and powerdomains should reference voltagedomains. Thanks to Shweta Gulati <shweta.gulati@ti.com> for comments. Thanks to Rajendra Nayak <rnayak@ti.com> for finding and fixing some bugs that prevented OMAP4 from booting: https://patchwork.kernel.org/patch/587311/ His patch has been folded into this one to avoid breaking OMAP4 between patches. Thanks also to Kevin Hilman <khilman@ti.com> for finding and fixing a compile problem when !CONFIG_PM: http://www.spinics.net/lists/arm-kernel/msg118067.html His patch has also been folded into this one to avoid breaking !CONFIG_PM builds. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Shweta Gulati <shweta.gulati@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Kevin Hilman <khilman@ti.com>
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Tony Lindgren authored
Merge branch 'for_2.6.39/pm-misc' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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- 10 Mar, 2011 12 commits
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Santosh Shilimkar authored
On the newer ARM processors like CortexA8, CortexA9, the caches can be speculatively loaded while they are getting flushed. Clear the SCTLR C bit to prevent further data cache allocation as part of cache clean routine Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
The current code saves few un-necessary registers which are read-only or write-only, unused CP15 registers. Remove them and keep only necessary CP15 registers part of low power context save/restore. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
When L1 cache is suppose to be lost, it needs to be cleaned before entrering to the low power mode. While at this, also fix few comments and remove un-necessary clean_l2 lable. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
On ARMv7 dsb, dmb instructions are supported and can be used directly instead of their cp15 equivalnet. Also remove the opcodes for smc and use the available instruction directly in OMAP3 low power asm code Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Tony Lindgren authored
There should be no reason to call h4_init_flash this early. It causes problems as things are not yet initialized. Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tero Kristo authored
This saves some power. OMAP4 version should check for GPT module ID, as autoidle is only supported on a subset of these. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
Add a new clockdomain flag, CLKDM_NO_AUTODEPS, which, when marked on a clockdomain, will prevent "autodeps" from being associated with the clockdomain. ("Autodeps" are sleep dependencies and wakeup dependencies from/to processor modules that are automatically added to a clockdomain when it is in hardware-supervised idle mode. They are deprecated -- a relic from the old CDP trees -- but are still in use for OMAP3.) Also, prevent the hwmod code from adding or removing initiator dependencies for clockdomains with this flag set. This patch should allow others to test which clockdomains actually still need autodeps. Thanks to Kevin Hilman <khilman@ti.com> for noting that the original version should also modify the hwmod code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com>
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Kishon Vijay Abraham I authored
Create a new API that forms a wrapper to _set_module_autoidle() to modify the AUTOIDLE bit. This API is intended to be used by drivers that requires direct manipulation of the AUTOIDLE bits in SYSCONFIG register. McBSP driver requires autoidle bit to be enabled/disabled while using sidetone feature. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: restrict the hwmod states that the autoidle bit can be changed in; changed function name; dropped "int" from "unsigned int long"] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
Some boards can't tolerate IP blocks being reset when they are initialized. Michael Büsch cites a case with the Nokia N810: http://www.spinics.net/lists/linux-omap/msg47277.html To allow such boards to continue working normally, allow board file maintainers to mark IP blocks to prevent them from being reset upon init. This is done via a hwmod function, omap_hwmod_no_setup_reset(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Michael Buesch <mb@bu3sch.de>
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omar ramirez authored
On OMAP2 and OMAP3 the reset ctrl shift doesn't match the status bit, as it does on OMAP4, when handling the reset lines. This patch adds a new member in the reset info structure, so now it can be added as part of hwmod data, and checked accordingly for OMAP2 or 3; otherwise, there could be cases when the shift masks doesn't match both of the registers, and a successful reset might throw an error message or vice versa. Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com> [paul@pwsan.com: added a warning if st_shift used on OMAP4; renamed 'r' variable; improved some documentation] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
The documented name of the HWMOD_NO_OCP_AUTOIDLE flag was incorrect; fix it. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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