1. 25 Apr, 2017 4 commits
    • Masahiro Yamada's avatar
      mtd: nand: relax ecc.read_page() return value for uncorrectable ECC · 07604686
      Masahiro Yamada authored
      The comment for ecc.read_page() requires that it should return
      "0 if bitflips uncorrectable".
      
      Actually, drivers could return positive values when uncorrectable
      bitflips occur.  For example, nand_read_page_swecc() is the case.
      If ecc.correct() returns -EBADMSG for the first ECC sector, and
      a positive value for the second one, nand_read_page_swecc() returns
      a positive max_bitflips and increments ecc_stats.failed for the same
      page.
      
      The requirement can be relaxed by tweaking nand_do_read_ops().
      Move the max_bitflips calculation below the retry.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Suggested-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
      07604686
    • Boris Brezillon's avatar
      mtd: nand: Remove unused chip->write_page() hook · f107d7a4
      Boris Brezillon authored
      The last/only user of the chip->write_page() hook (the Atmel NAND
      controller driver) has been reworked and is no longer specifying a custom
      ->write_page() implementation.
      Drop this hook before someone else start abusing it.
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
      Reviewed-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      f107d7a4
    • Boris Brezillon's avatar
      mtd: nand: atmel: Document the new DT bindings · 82d0bf34
      Boris Brezillon authored
      The old NAND bindings were not exactly describing the hardware topology
      and were preventing definitions of several NAND chips under the same
      NAND controller.
      
      New bindings address these limitations and should be preferred over the
      old ones for new SoCs/boards.
      Old bindings are still supported for backward compatibility but are
      marked deprecated in the doc.
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
      Reviewed-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
      Acked-by: default avatarRob Herring <robh@kernel.org>
      82d0bf34
    • Boris Brezillon's avatar
      mtd: nand: Cleanup/rework the atmel_nand driver · f88fc122
      Boris Brezillon authored
      This is a complete rewrite of the driver whose main purpose is to
      support the new DT representation where the NAND controller node is now
      really visible in the DT and appears under the EBI bus. With this new
      representation, we can add other devices under the EBI bus without
      risking pinmuxing conflicts (the NAND controller is under the EBI
      bus logic and as such, share some of its pins with other devices
      connected on this bus).
      
      Even though the goal of this rework was not necessarily to add new
      features, the new driver has been designed with this in mind. With a
      clearer separation between the different blocks and different IP
      revisions, adding new functionalities should be easier (we already
      have plans to support SMC timing configuration so that we no longer
      have to rely on the configuration done by the bootloader/bootstrap).
      
      Also note that we no longer have a custom ->cmdfunc() implementation,
      which means we can now benefit from new features added in the core
      implementation for free (support for new NAND operations for example).
      
      The last thing that we gain with this rework is support for multi-chips
      and multi-dies chips, thanks to the clean NAND controller <-> NAND
      devices representation.
      
      During this transition we also dropped support for AVR32 SoCs which
      should soon disappear from mainline (removal of the AVR32 arch is
      planned for 4.12).
      
      This new driver has been tested on several platforms (at91sam9261,
      at91sam9g45, at91sam9x5, sama5d3 and sama5d4) to make sure it did not
      introduce regressions, and it's worth mentioning that old bindings are
      still supported (which partly explain the positive diffstat).
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
      Acked-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
      f88fc122
  2. 29 Mar, 2017 2 commits
  3. 28 Mar, 2017 4 commits
  4. 27 Mar, 2017 3 commits
  5. 24 Mar, 2017 11 commits
  6. 23 Mar, 2017 12 commits
  7. 16 Mar, 2017 4 commits