- 18 Nov, 2008 15 commits
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Mike Frysinger authored
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Mike Frysinger <vapier.adi@gmail.com> Signed-off-by:
Bryan Wu <cooloney@kernel.org>
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
Delay PLL_CTL/VR_CTL wrappers as much as possible to avoid the inter-dependency problems with cdef and common headers Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
overlay thread.usp over PT_USP when getting the whole regfile to match PT_USP behavior Signed-off-by:
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Mike Frysinger authored
rewrite blackfin_invalidate_entire_dcache() in C for easier management, better optimization, and so we take all SSYNC anomalies into account Signed-off-by:
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Mike Frysinger authored
Cc: Graf Yang <graf.yang@analog.com> Signed-off-by:
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Sonic Zhang authored
Hardware breakpoint doesn't always work in kgdb. It works at the first two times, but if you repeatedly trigger that hardware breakpoint, it would slip over that point once in two times. Fix it by always setting hw bp skip to 0. gdb does skip after hw bp trap. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
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Mike Frysinger authored
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Bryan Wu authored
Blackfin arch: Use GPIO_BANKSIZE macro to replace const number 16 for GPIO_BANK_NUM macro caculating Signed-off-by:
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- 07 Jan, 2009 1 commit
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to some other misc code Singed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
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- 18 Nov, 2008 2 commits
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin kernel and memory management code Singed-off-by:
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin CPLB related code Signed-off-by:
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- 07 Jan, 2009 2 commits
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin header files and machine common code Signed-off-by:
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to BF561 kernel code Signed-off-by:
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- 18 Nov, 2008 13 commits
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Mike Frysinger authored
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Michael Hennerich authored
- This patch adds support for ARCH_WANT_OPTIONAL_GPIOLIB. - It may be changed in future to ARCH_REQUIRE_GPIOLIB. - Change GPIO_BANK_NUM use DIV_ROUND_UP( , ) macro Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Michael Hennerich authored
- Remove SSYNC() - Use irq_to_gpio where applicable - Remove gpio_edge_triggered bitfield, check irq_desc fields instead. - Remove gpio_both_edge_triggeredb bitfield, check irq_desc fields instead. - Use BITMAP and bitops on gpio_enabled - Preferably use 32-bit - Looking at the disassembly this indeed saves quite a few instructions. Signed-off-by:
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Yi Li authored
Disable spi_mmc DMA by default. Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
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Mike Frysinger authored
- remove SSYNC() left over from irq init split - do not force SSYNC() when masking/unmasking IRQs in the SIC as any order enforced by the hardware should already be enforced by software Signed-off-by:
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Bryan Wu authored
Blackfin arch: fix bug - gpio_bank() macros messed up bank number caculating with positioning a gpio The whole story: Before BF51x merged, all the MAX_BLACKFIN_GPIOS are integral multiple of GPIO_BANKSIZE (= 16). But BF51x provides MAX_BLACKFIN_GPIOS = 40 which includes 3 banks and the 3rd bank has only 8 GPIO pins. Therefore, gpio_bank() macros is correct when you try to find a GPIO in which bank (GPIO_35 is in bank 2). But on BF51x gpio_bank(MAX_BLACKFIN_GPIOS) only gives out 2 banks instead of 3 banks for some static array initialization. This patch add a new macros gpio_bank_n() and GPIO_BANK_NUM to do bank number caculating and remain the gpio_bank() macros for positioning a gpio in which bank. Signed-off-by: -
Mike Frysinger authored
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Michael Hennerich authored
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Mike Frysinger authored
- to avoid uninitialized errors - make invalid sizes a build error Signed-off-by:
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Mike Frysinger authored
our kernel should be sane now, and we want to catch NULL bugs, not ignore them Signed-off-by:
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Mike Frysinger authored
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Michael Hennerich authored
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Mike Frysinger authored
- do not bother generating deprecated /sys files by default now since mdev does not need it - Don't built-in char sport driver and build it as a module in defconfig - disable CONFIG_DEVKMEM by default - enable spi flash driver on boards that have one - switch config to the NAND platfrom driver rather than the bfin async one - do not make BFIN_DMA_5XX optional since a large portion of our code relies on dma functions existing Signed-off-by:
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- 29 Oct, 2008 1 commit
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Michael Hennerich authored
keep BUG_ON in DMA request, free and set_dma_callback. Signed-off-by:
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- 28 Oct, 2008 6 commits
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Mike Frysinger authored
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Michael Hennerich authored
Tons of SSYNC operation will impact the DMA performance Signed-off-by: -
Michael Hennerich authored
Add irq to struct dma_channel lookup channel2irq() only once, since channel2irq() is fairly large on some Blackfin derivatives. Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
refine the gpio check in peripheral_request() so that it only checks pins that can be used as both GPIO and a peripheral Signed-off-by:
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Mike Frysinger authored
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