1. 01 Mar, 2010 13 commits
  2. 28 Feb, 2010 23 commits
  3. 27 Feb, 2010 4 commits
    • Linus Torvalds's avatar
      Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc · ef1a8de8
      Linus Torvalds authored
      * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (88 commits)
        powerpc: Fix lwsync feature fixup vs. modules on 64-bit
        powerpc: Convert pmc_owner_lock to raw_spinlock
        powerpc: Convert die.lock to raw_spinlock
        powerpc: Convert tlbivax_lock to raw_spinlock
        powerpc: Convert mpic locks to raw_spinlock
        powerpc: Convert pmac_pic_lock to raw_spinlock
        powerpc: Convert big_irq_lock to raw_spinlock
        powerpc: Convert feature_lock to raw_spinlock
        powerpc: Convert i8259_lock to raw_spinlock
        powerpc: Convert beat_htab_lock to raw_spinlock
        powerpc: Convert confirm_error_lock to raw_spinlock
        powerpc: Convert ipic_lock to raw_spinlock
        powerpc: Convert native_tlbie_lock to raw_spinlock
        powerpc: Convert beatic_irq_mask_lock to raw_spinlock
        powerpc: Convert nv_lock to raw_spinlock
        powerpc: Convert context_lock to raw_spinlock
        powerpc/85xx: Add NOR, LEDs and PIB support for MPC8568E-MDS boards
        powerpc/86xx: Enable VME driver on the GE SBC610
        powerpc/86xx: Enable VME driver on the GE PPC9A
        powerpc/86xx: Add MSI section to GE PPC9A DTS
        ...
      ef1a8de8
    • Maxim Kuvyrkov's avatar
      m68k: Define sigcontext ABI of ColdFire · 00ebfe58
      Maxim Kuvyrkov authored
      The following patch defines sigcontext ABI of ColdFire.  Due to ISA
      restrictions ColdFire needs different rt_sigreturn trampoline.
      
      And due to ColdFire FP registers being 8-bytes instead of 12-bytes on
      m68k, sigcontext and fpregset structures should be updated.
      
      Regarding the sc_fpstate[16+6*8] field, it would've been enough 16
      bytes to store ColdFire's FP state.  To accomodate GLIBC's libSegFault
      it would'be been enough 6*8 bytes (room for the 6 non-call-clobbered
      FP registers).  I set it to 16+6*8 to provide some extra space for any
      future changes in the ColdFire FPU.
      Signed-off-by: default avatarMaxim Kuvyrkov <maxim@codesourcery.com>
      Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
      00ebfe58
    • Maxim Kuvyrkov's avatar
      m68knommu: NPTL support for uClinux · a58f7534
      Maxim Kuvyrkov authored
      Port syscalls for NPTL support to m68knommu.
      Signed-off-by: default avatarMaxim Kuvyrkov <maxim@codesourcery.com>
      Acked-by: default avatarGreg Ungerer <gerg@uclinux.org>
      Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
      a58f7534
    • Maxim Kuvyrkov's avatar
      m68k: Add NPTL support · 9674cdc7
      Maxim Kuvyrkov authored
      This patch adds several syscalls, that provide necessary
      functionality to support NPTL on m68k/ColdFire.
      The syscalls are get_thread_area, set_thread_area, atomic_cmpxchg_32 and
      atomic_barrier.
      The cmpxchg syscall is required for ColdFire as it doesn't support 'cas'
      instruction.
      
      Also a ptrace call PTRACE_GET_THREAD_AREA is added to allow debugger to
      inspect the TLS storage.
      Signed-off-by: default avatarMaxim Kuvyrkov <maxim@codesourcery.com>
      Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
      9674cdc7