- 21 May, 2018 18 commits
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Felipe Balbi authored
We don't need to return a value anymore here. Let's remove it. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
It has no use anymore. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
By now, it has the same semantics as DWC3_EP_TRANSFER_STARTED, but that has a much more descriptive name. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
We will need an up-to-date frame_number from XferInProgress too when future patches improve our handling of Isoc endpoints. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
The core requires the extra two bits of information for properly scheduling Isochronous transfers. This means that we can't rely on __dwc3_gadget_get_frame(). Let's always cache uFrame number from XferNotReady instead. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Endpoint handlers need to know about endpoints, not dwc. If they really need access to dwc (e.g. for printing error messages) we have a reference to it tucked inside the endpoint. This patch has no functional changes, it's simply moving things around. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Cleanup only, no functional changes. Just making code easier to follow. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Cleanup only, no functional changes. This just matches the event name with its handler. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
We *KNOW* which events we enable for which endpoint types and we *KNOW* when they'll trigger. The endpoint type checks are pointless. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
That has never proven useful in any way. Just remove it. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
This patch simply renames two functions to more descriptive names so that it's easier to understand what they're doing. Cleanup only, no functional changes. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Instead of constantly calling kick transfer everything some event shows up, let's just rely on the fact that we send Update Transfer every time a new request is queued. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Now that we're making sure we don't have XferComplete events, we can rename this function to what it actually handles: dwc3_gadget_endpoint_transfer_in_progress() Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
XferComplete is enabled only for the default control pipe, let's make that clear in the code. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
We don't use XferNotReady for anything other than Default Control Pipe, which is handled in ep0.c, and Isochronous endpoints. Let's make that clear in the code. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Interrupt endpoints behave much like Bulk endpoints with the exception that they are periodic. We can pre-issue Start Transfer exactly as we do for Bulk endpoints. While at that, remove one trailing blank line which is unnecessary. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Anurag Kumar Vulisha authored
The present code correctly fetches the req which were previously not queued from the started_list but fails to continue queuing from the sg where it previously stopped queuing (because of the unavailable TRB's). This patch correct's the code to continue queuing from the correct sg present in the sglist. For example, consider 5 sgs in req. Because of limited TRB's among the 5 sgs only 3 got queued. This patch corrects the code to start queuing from correct sg i.e 4th sg when the TRBs are available. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Anurag Kumar Vulisha authored
The code logic in dwc3_prepare_one_trb() incorrectly uses the address and length fields present in req packet for mapping TRB's instead of using the address and length fields of scattergather lists. This patch correct's the code to use sg->address and sg->length when scattergather lists are present. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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- 16 May, 2018 2 commits
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Andrzej Hajda authored
extcon device is used to detect host/device connection. Since extcon OF property is deprecated, alternative method should be added. This method uses OF graph bindings to locate extcon. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Masahiro Yamada authored
Historically, the clocks and resets are handled on the glue layer side instead of the DWC3 core. For simple cases, dwc3-of-simple.c takes care of arbitrary number of clocks and resets. The DT node structure typically looks like as follows: dwc3-glue { compatible = "foo,dwc3"; clocks = ...; resets = ...; ... dwc3 { compatible = "snps,dwc3"; ... }; } By supporting the clocks and the reset in the dwc3/core.c, it will be turned into a single node: dwc3 { compatible = "foo,dwc3", "snps,dwc3"; clocks = ...; resets = ...; ... } This commit adds the binding of clocks and resets specific to this IP. The number of clocks should generally be the same across SoCs, it is just some SoCs either tie clocks together or do not provide software control of some of the clocks. I took the clock names from the Synopsys datasheet: "ref" (ref_clk), "bus_early" (bus_clk_early), and "suspend" (suspend_clk). I found only one reset line in the datasheet, hence the reset-names property is omitted. Those clocks are required for new platforms. Enforcing the new binding breaks existing platforms since they specify clocks (and resets) in their glue layer node, but nothing in the core node. I listed such exceptional cases in the DT binding. The driver code has been relaxed to accept no clock. This change is based on the discussion [1]. I inserted reset_control_deassert() and clk_bulk_enable() before the first register access, i.e. dwc3_cache_hwparams(). [1] https://patchwork.kernel.org/patch/10284265/Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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- 15 May, 2018 20 commits
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Romain Izard authored
Fix the fallout of the conversion to GPIO descriptors in 3df03408. Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Romain Izard authored
The include defines the private platform_data structure used with AVR platforms. It has no user since 7c55984e. Remove it. Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Romain Izard authored
When converting to GPIO descriptors, gpiod_get_value automatically handles the line inversion flags from the device tree. Do not invert the line twice. Fixes: 3df03408 ("usb: gadget: udc: atmel: convert to use GPIO descriptors") Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Michel Pollet authored
A message can be forged to crash the stack; here we make sure we don't completely break the system if this occurs Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Masahiro Yamada authored
It is not a good idea to directly modify the resource of a platform device. Modify its local copy, and pass it to devm_ioremap_resource() so that we do not need to restore it in the failure path and the remove hook. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Chunfeng Yun authored
The USB3CV version 2.1.80 (March 26, 2018) requires all devices ( gen1, gen2, single lane, dual lane) to return the value of 0x0320 in the bcdUSB field Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Manu Gautam authored
Some PHY drivers (e.g. for Qualcomm QUSB2 and QMP PHYs) support runtime PM to reduce PHY power consumption during bus_suspend. Add changes to let core auto-suspend PHYs on host bus-suspend using GUSB2PHYCFG register if needed for a platform. Also perform PHYs runtime suspend/resume and let platform glue drivers e.g. dwc3-qcom handle remote wakeup during bus suspend by waking up devices on receiving wakeup event from PHY. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Manu Gautam authored
DWC3 controller on Qualcomm SOCs has a Qscratch wrapper. Some of its uses are described below resulting in need to have a separate glue driver instead of using dwc3-of-simple: - It exposes register interface to override vbus-override and lane0-pwr-present signals going to hardware. These must be updated in peripheral mode for DWC3 if vbus lines are not connected to hardware block. Otherwise RX termination in SS mode or DP pull-up is not applied by device controller. - pwr_events_irq_stat support to check if USB2 PHY is in L2 state before glue driver proceeds with suspend. - Support for wakeup interrupts lines that are asserted whenever there is any wakeup event on USB3 or USB2 bus. - Support to replace pip3 clock going to DWC3 with utmi clock for hardware configuration where SSPHY is not used with DWC3. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Manu Gautam authored
Existing documentation has lot of incorrect information as it was originally added for a driver that no longer exists. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Icenowy Zheng authored
Add compatible string to use this generic glue layer to support Allwinner H6 platform's dwc3 controller. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Lukasz Nowak authored
In case there are multiple ecm instances, either for multiple otg controllers, or multiple virtual links using libcomposite, each instance needs to have its own host mac address string value for iMACAddress. Update the source array (ecm_string_defs), every time before usb_gstrings_attach(). Without that, all links wrongly were getting the same, last allocated, host mac address, rather than the correct one, as requested via configfs. Signed-off-by: Lukasz Nowak <lukasz.nowak@exablue.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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John Greb authored
Fixes: <b3e3893e> ("net: use core MTU range checking") which patched only one of two functions used to setup the USB Gadget Ethernet driver, causing a serious performance regression in the ability to increase mtu size above 1500. Signed-off-by: John Greb <h3x4m3r0n@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Artur Petrosyan authored
The current frame_number is read from core for both device and host modes. Reading of the current frame number needs to be performed ASAP due to IRQ latency's. This is why, it is moved to common interrupt handler. Accordingly updated dwc2_gadget_target_frame_elapsed() function which uses stored frame_number instead of reading frame number. In cases when target frame value is incremented the frame_number is required to read again. Signed-off-by: Artur Petrosyan <arturp@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Stefan Wahren authored
Dumping the registers via debugfs makes USB on Raspberry Pi completely unusable. The read of register GRXSTSP ("Receive Status Read and Pop Register") is responsible for this behaviour, because it pops the RX FIFO. So avoid this by omitting the relevant register. CC: Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Fixes: 563cf017 ("usb: dwc2: debugfs: add support for complete register dump") Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Artur Petrosyan authored
Crash caused by going out of "eps_out" array range. Iteration on "eps_out" changed to less than "num_of_eps". Signed-off-by: Artur Petrosyan <arturp@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Grigor Tovmasyan authored
Added GHWCFG4_IPG_ISOC_SUPPORTED and DCFG_IPG_ISOC_SUPPORDED bits definitions to enable/disable IPG feature. Added ipg_isoc_en core parameter which will indicate IPG support enable/disable and initialize it. Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Minas Harutyunyan authored
In DDMA mode required to enable BNA interrupt for both directions. Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Minas Harutyunyan authored
Changed existing two descriptor-chain flow to one chain. In two-chain implementation BNA interrupt used for switching between two chains. BNA interrupt asserted because of returning to beginning of the chain based on L-bit of last descriptor. Because of that we lose packets. This issue resolved by using one desc-chain. Removed all staff related to two desc-chain flow from DDMA ISOC related functions. Removed request length checking from dwc2_gadget_fill_isoc_desc() function. Request length checking added to dwc2_hsotg_ep_queue() function. If request length greater than descriptor limits then request not added to queue. Additional checking done for High Bandwidth ISOC OUT's which not supported by driver. In dwc2_gadget_fill_isoc_desc() function also checked desc-chain status (full or not) to avoid of reusing not yet processed descriptors. In dwc2_gadget_start_isoc_ddma() function creation of desc-chain always started from descriptor 0. Before filling descriptors, they were initialized by HOST BUSY status. In dwc2_gadget_complete_isoc_request_ddma() added checking for desc-chain rollover. Also added checking completion status. Request completed successfully if DEV_DMA_STS is DEV_DMA_STS_SUCC, otherwise complete with actual=0. For systems with high IRQ latency added pointer compl_desc to next descriptor to be completed by XferCompl interrupt. This pointer replace descriptor index calculation based on DxEPDMA register. On descriptor completion interrupt processing all descriptors starting from compl_desc till descriptor which Buffer Status field not equal DMA_DONE status. Actually removed dwc2_gadget_start_next_isoc_ddma() function because now driver use only one desc-chain and instead that function added dwc2_gadget_handle_isoc_bna() function for handling BNA interrupts. Handling BNA interrupt done by flushing TxFIFOs for OUT EPs, completing request with actual=0 and resetting desc-chain number and target frame to initial values for restarting transfers. On handling NAK request completed with actual=0. Incremented target frame to allow fill desc chain and start transfers. In DDMA mode avoided of frame number incrementing, because tracking of frame number performed in dwc2_gadget_fill_isoc_desc() function. When core assert XferCompl along with BNA, we should ignore XferCompl in dwc2_hsotg_epint() function. On BNA interrupt replaced dwc2_gadget_start_next_isoc_ddma() by above mentioned BNA handler. In dwc2_hsotg_ep_enable() function added sanity check of bInterval for ISOC IN in DDMA mode, because HW doesn't supported EP's with bInterval more than 10 and check for mc for ISOC OUT transfers, because core doesn't support high bandwidth transfers. Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Chunfeng Yun authored
In fact the driver depends on EXTCON only when it's configed as USB_MTU3_DUAL_ROLE, so make USB_MTU3_DUAL_ROLE depend on EXTCON but not USB_MTU3. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Chunfeng Yun authored
There is an error dialog popped up in PC when test TEST_J/K by EHSETT tool, due to not waiting for the completion of control transfer. Here fix it by entering test mode after Status Stage finish. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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