1. 12 Oct, 2020 21 commits
    • Linus Torvalds's avatar
      Merge tag 'x86-entry-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 13cb7349
      Linus Torvalds authored
      Pull x86 entry code updates from Thomas Gleixner:
       "More consolidation and correctness fixes for the debug exception:
      
         - Ensure BTF synchronization under all circumstances
      
         - Distangle kernel and user mode #DB further
      
         - Get ordering vs. the debug notifier correct to make KGDB work more
           reliably.
      
         - Cleanup historical gunk and make the code simpler to understand"
      
      * tag 'x86-entry-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/debug: Change thread.debugreg6 to thread.virtual_dr6
        x86/debug: Support negative polarity DR6 bits
        x86/debug: Simplify hw_breakpoint_handler()
        x86/debug: Remove aout_dump_debugregs()
        x86/debug: Remove the historical junk
        x86/debug: Move cond_local_irq_enable() block into exc_debug_user()
        x86/debug: Move historical SYSENTER junk into exc_debug_kernel()
        x86/debug: Simplify #DB signal code
        x86/debug: Remove handle_debug(.user) argument
        x86/debug: Move kprobe_debug_handler() into exc_debug_kernel()
        x86/debug: Sync BTF earlier
      13cb7349
    • Linus Torvalds's avatar
      Merge tag 'x86-irq-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · cc734372
      Linus Torvalds authored
      Pull x86 irq updates from Thomas Gleixner:
       "Surgery of the MSI interrupt handling to prepare the support of
        upcoming devices which require non-PCI based MSI handling:
      
         - Cleanup historical leftovers all over the place
      
         - Rework the code to utilize more core functionality
      
         - Wrap XEN PCI/MSI interrupts into an irqdomain to make irqdomain
           assignment to PCI devices possible.
      
         - Assign irqdomains to PCI devices at initialization time which
           allows to utilize the full functionality of hierarchical
           irqdomains.
      
         - Remove arch_.*_msi_irq() functions from X86 and utilize the
           irqdomain which is assigned to the device for interrupt management.
      
         - Make the arch_.*_msi_irq() support conditional on a config switch
           and let the last few users select it"
      
      * tag 'x86-irq-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (40 commits)
        PCI: MSI: Fix Kconfig dependencies for PCI_MSI_ARCH_FALLBACKS
        x86/apic/msi: Unbreak DMAR and HPET MSI
        iommu/amd: Remove domain search for PCI/MSI
        iommu/vt-d: Remove domain search for PCI/MSI[X]
        x86/irq: Make most MSI ops XEN private
        x86/irq: Cleanup the arch_*_msi_irqs() leftovers
        PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable
        x86/pci: Set default irq domain in pcibios_add_device()
        iommm/amd: Store irq domain in struct device
        iommm/vt-d: Store irq domain in struct device
        x86/xen: Wrap XEN MSI management into irqdomain
        irqdomain/msi: Allow to override msi_domain_alloc/free_irqs()
        x86/xen: Consolidate XEN-MSI init
        x86/xen: Rework MSI teardown
        x86/xen: Make xen_msi_init() static and rename it to xen_hvm_msi_init()
        PCI/MSI: Provide pci_dev_has_special_msi_domain() helper
        PCI_vmd_Mark_VMD_irqdomain_with_DOMAIN_BUS_VMD_MSI
        irqdomain/msi: Provide DOMAIN_BUS_VMD_MSI
        x86/irq: Initialize PCI/MSI domain at PCI init time
        x86/pci: Reducde #ifdeffery in PCI init code
        ...
      cc734372
    • Linus Torvalds's avatar
      Merge tag 'irq-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · c457cc80
      Linus Torvalds authored
      Pull irq updates from Thomas Gleixner:
       "Updates for the interrupt subsystem:
      
        Core:
         - Allow trimming of interrupt hierarchy to support odd hardware
           setups where only a subset of the interrupts requires the full
           hierarchy.
      
         - Allow the retrigger mechanism to follow a hierarchy to simplify
           driver code.
      
         - Provide a mechanism to force enable wakeup interrrupts on suspend.
      
         - More infrastructure to handle IPIs in the core code
      
        Architectures:
         - Convert ARM/ARM64 IPI handling to utilize the interrupt core code.
      
        Drivers:
         - The usual pile of new interrupt chips (MStar, Actions Owl, TI
           PRUSS, Designware ICTL)
      
         - ARM(64) IPI related conversions
      
         - Wakeup support for Qualcom PDC
      
         - Prevent hierarchy corruption in the NVIDIA Tegra driver
      
         - The usual small fixes, improvements and cleanups all over the
           place"
      
      * tag 'irq-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
        dt-bindings: interrupt-controller: Add MStar interrupt controller
        irqchip/irq-mst: Add MStar interrupt controller support
        soc/tegra: pmc: Don't create fake interrupt hierarchy levels
        soc/tegra: pmc: Allow optional irq parent callbacks
        gpio: tegra186: Allow optional irq parent callbacks
        genirq/irqdomain: Allow partial trimming of irq_data hierarchy
        irqchip/qcom-pdc: Reset PDC interrupts during init
        irqchip/qcom-pdc: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag
        pinctrl: qcom: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag
        genirq/PM: Introduce IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag
        pinctrl: qcom: Use return value from irq_set_wake() call
        pinctrl: qcom: Set IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags
        ARM: Handle no IPI being registered in show_ipi_list()
        MAINTAINERS: Add entries for Actions Semi Owl SIRQ controller
        irqchip: Add Actions Semi Owl SIRQ controller
        dt-bindings: interrupt-controller: Add Actions SIRQ controller binding
        dt-bindings: dw-apb-ictl: Update binding to describe use as primary interrupt controller
        irqchip/dw-apb-ictl: Add primary interrupt controller support
        irqchip/dw-apb-ictl: Refactor priot to introducing hierarchical irq domains
        genirq: Add stub for set_handle_irq() when !GENERIC_IRQ_MULTI_HANDLER
        ...
      c457cc80
    • Linus Torvalds's avatar
      Merge tag 'timers-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · f5f59336
      Linus Torvalds authored
      Pull timekeeping updates from Thomas Gleixner:
       "Updates for timekeeping, timers and related drivers:
      
        Core:
      
         - Early boot support for the NMI safe timekeeper by utilizing
           local_clock() up to the point where timekeeping is initialized.
           This allows printk() to store multiple timestamps in the ringbuffer
           which is useful for coordinating dmesg information across a fleet
           of machines.
      
         - Provide a multi-timestamp accessor for printk()
      
         - Make timer init more robust by checking for invalid timer flags.
      
         - Comma vs semicolon fixes
      
        Drivers:
      
         - Support for new platforms in existing drivers (SP804 and Renesas
           CMT)
      
         - Comma vs semicolon fixes
      
      * tag 'timers-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        clocksource/drivers/armada-370-xp: Use semicolons rather than commas to separate statements
        clocksource/drivers/mps2-timer: Use semicolons rather than commas to separate statements
        timers: Mask invalid flags in do_init_timer()
        clocksource/drivers/sp804: Enable Hisilicon sp804 timer 64bit mode
        clocksource/drivers/sp804: Add support for Hisilicon sp804 timer
        clocksource/drivers/sp804: Support non-standard register offset
        clocksource/drivers/sp804: Prepare for support non-standard register offset
        clocksource/drivers/sp804: Remove a mismatched comment
        clocksource/drivers/sp804: Delete the leading "__" of some functions
        clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h
        clocksource/drivers/sp804: Cleanup clk_get_sys()
        dt-bindings: timer: renesas,cmt: Document r8a774e1 CMT support
        dt-bindings: timer: renesas,cmt: Document r8a7742 CMT support
        alarmtimer: Convert comma to semicolon
        timekeeping: Provide multi-timestamp accessor to NMI safe timekeeper
        timekeeping: Utilize local_clock() for NMI safe timekeeper during early boot
      f5f59336
    • Linus Torvalds's avatar
      Merge tag 'core-debugobjects-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 20d49bfc
      Linus Torvalds authored
      Pull debugobjects updates from Thomas Gleixner:
       "A small set of updates for debug objects:
      
         - Make all debug object descriptors constant. There is no reason to
           have them writeable.
      
         - Free the per CPU object pool after CPU unplug to avoid memory
           waste"
      
      * tag 'core-debugobjects-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        debugobjects: Free per CPU pool after CPU unplug
        treewide: Make all debug_obj_descriptors const
        debugobjects: Allow debug_obj_descr to be const
      20d49bfc
    • Linus Torvalds's avatar
      Merge tag 'x86_core_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 1e6d1d96
      Linus Torvalds authored
      Pull x86 fix from Borislav Petkov:
       "A single fix making the error message when the opcode bytes at rIP
        cannot be accessed during an oops, more precise"
      
      * tag 'x86_core_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/dumpstack: Fix misleading instruction pointer error message
      1e6d1d96
    • Linus Torvalds's avatar
      Merge tag 'x86_cache_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 64743e65
      Linus Torvalds authored
      Pull x86 cache resource control updates from Borislav Petkov:
      
       - Misc cleanups to the resctrl code in preparation for the ARM side
         (James Morse)
      
       - Add support for controlling per-thread memory bandwidth throttling
         delay values on hw which supports it (Fenghua Yu)
      
      * tag 'x86_cache_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/resctrl: Enable user to view thread or core throttling mode
        x86/resctrl: Enumerate per-thread MBA controls
        cacheinfo: Move resctrl's get_cache_id() to the cacheinfo header file
        x86/resctrl: Add struct rdt_cache::arch_has_{sparse, empty}_bitmaps
        x86/resctrl: Merge AMD/Intel parse_bw() calls
        x86/resctrl: Add struct rdt_membw::arch_needs_linear to explain AMD/Intel MBA difference
        x86/resctrl: Use is_closid_match() in more places
        x86/resctrl: Include pid.h
        x86/resctrl: Use container_of() in delayed_work handlers
        x86/resctrl: Fix stale comment
        x86/resctrl: Remove struct rdt_membw::max_delay
        x86/resctrl: Remove unused struct mbm_state::chunks_bw
      64743e65
    • Linus Torvalds's avatar
      Merge tag 'x86_cleanups_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · f94ab231
      Linus Torvalds authored
      Pull x86 cleanups from Borislav Petkov:
       "Misc minor cleanups"
      
      * tag 'x86_cleanups_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/entry: Fix typo in comments for syscall_enter_from_user_mode()
        x86/resctrl: Fix spelling in user-visible warning messages
        x86/entry/64: Do not include inst.h in calling.h
        x86/mpparse: Remove duplicate io_apic.h include
      f94ab231
    • Linus Torvalds's avatar
      Merge tag 'x86_fpu_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · a0d445f7
      Linus Torvalds authored
      Pull x86 fpu updates from Borislav Petkov:
      
       - Allow clearcpuid= to accept multiple bits (Arvind Sankar)
      
       - Move clearcpuid= parameter handling earlier in the boot, away from
         the FPU init code and to a generic location (Mike Hommey)
      
      * tag 'x86_fpu_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/fpu: Handle FPU-related and clearcpuid command line arguments earlier
        x86/fpu: Allow multiple bits in clearcpuid= parameter
      a0d445f7
    • Linus Torvalds's avatar
      Merge tag 'x86_fsgsbase_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 87194efe
      Linus Torvalds authored
      Pull x86 fsgsbase updates from Borislav Petkov:
       "Misc minor cleanups and corrections to the fsgsbase code and
        respective selftests"
      
      * tag 'x86_fsgsbase_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        selftests/x86/fsgsbase: Test PTRACE_PEEKUSER for GSBASE with invalid LDT GS
        selftests/x86/fsgsbase: Reap a forgotten child
        x86/fsgsbase: Replace static_cpu_has() with boot_cpu_has()
        x86/entry/64: Correct the comment over SAVE_AND_SET_GSBASE
      87194efe
    • Linus Torvalds's avatar
      Merge tag 'x86_misc_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 9e536c81
      Linus Torvalds authored
      Pull misc x86 fixes fromm Borislav Petkov:
      
       - Ratelimit the message about writes to unrecognized MSRs so that they
         don't spam the console log (Chris Down)
      
       - Document how the /proc/cpuinfo machinery works for future reference
         (Kyung Min Park, Ricardo Neri and Dave Hansen)
      
       - Correct the current NMI's duration calculation (Libing Zhou)
      
      * tag 'x86_misc_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/nmi: Fix nmi_handle() duration miscalculation
        Documentation/x86: Add documentation for /proc/cpuinfo feature flags
        x86/msr: Make source of unrecognised MSR writes unambiguous
        x86/msr: Prevent userspace MSR access from dominating the console
      9e536c81
    • Linus Torvalds's avatar
      Merge tag 'x86_pasid_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · ac74075e
      Linus Torvalds authored
      Pull x86 PASID updates from Borislav Petkov:
       "Initial support for sharing virtual addresses between the CPU and
        devices which doesn't need pinning of pages for DMA anymore.
      
        Add support for the command submission to devices using new x86
        instructions like ENQCMD{,S} and MOVDIR64B. In addition, add support
        for process address space identifiers (PASIDs) which are referenced by
        those command submission instructions along with the handling of the
        PASID state on context switch as another extended state.
      
        Work by Fenghua Yu, Ashok Raj, Yu-cheng Yu and Dave Jiang"
      
      * tag 'x86_pasid_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/asm: Add an enqcmds() wrapper for the ENQCMDS instruction
        x86/asm: Carve out a generic movdir64b() helper for general usage
        x86/mmu: Allocate/free a PASID
        x86/cpufeatures: Mark ENQCMD as disabled when configured out
        mm: Add a pasid member to struct mm_struct
        x86/msr-index: Define an IA32_PASID MSR
        x86/fpu/xstate: Add supervisor PASID state for ENQCMD
        x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions
        Documentation/x86: Add documentation for SVA (Shared Virtual Addressing)
        iommu/vt-d: Change flags type to unsigned int in binding mm
        drm, iommu: Change type of pasid to u32
      ac74075e
    • Linus Torvalds's avatar
      Merge tag 'x86_platform_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 8b6591fd
      Linus Torvalds authored
      Pull x86 platform updates from Borislav Petkov:
      
       - Cleanup different aspects of the UV code and start adding support for
         the new UV5 class of systems (Mike Travis)
      
       - Use a flexible array for a dynamically sized struct uv_rtc_timer_head
         (Gustavo A. R. Silva)
      
      * tag 'x86_platform_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/platform/uv: Update Copyrights to conform to HPE standards
        x86/platform/uv: Update for UV5 NMI MMR changes
        x86/platform/uv: Update UV5 TSC checking
        x86/platform/uv: Update node present counting
        x86/platform/uv: Update UV5 MMR references in UV GRU
        x86/platform/uv: Adjust GAM MMR references affected by UV5 updates
        x86/platform/uv: Update MMIOH references based on new UV5 MMRs
        x86/platform/uv: Add and decode Arch Type in UVsystab
        x86/platform/uv: Add UV5 direct references
        x86/platform/uv: Update UV MMRs for UV5
        drivers/misc/sgi-xp: Adjust references in UV kernel modules
        x86/platform/uv: Remove SCIR MMR references for UV systems
        x86/platform/uv: Remove UV BAU TLB Shootdown Handler
        x86/uv/time: Use a flexible array in struct uv_rtc_timer_head
      8b6591fd
    • Linus Torvalds's avatar
      Merge tag 'x86_cpu_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 92a0610b
      Linus Torvalds authored
      Pull x86 cpu updates from Borislav Petkov:
      
       - Add support for hardware-enforced cache coherency on AMD which
         obviates the need to flush cachelines before changing the PTE
         encryption bit (Krish Sadhukhan)
      
       - Add Centaur initialization support for families >= 7 (Tony W Wang-oc)
      
       - Add a feature flag for, and expose TSX suspend load tracking feature
         to KVM (Cathy Zhang)
      
       - Emulate SLDT and STR so that windows programs don't crash on UMIP
         machines (Brendan Shanks and Ricardo Neri)
      
       - Use the new SERIALIZE insn on Intel hardware which supports it
         (Ricardo Neri)
      
       - Misc cleanups and fixes
      
      * tag 'x86_cpu_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains
        x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains
        x86/cpu: Add hardware-enforced cache coherency as a CPUID feature
        x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support
        x86/cpu/centaur: Replace two-condition switch-case with an if statement
        x86/kvm: Expose TSX Suspend Load Tracking feature
        x86/cpufeatures: Enumerate TSX suspend load address tracking instructions
        x86/umip: Add emulation/spoofing for SLDT and STR instructions
        x86/cpu: Fix typos and improve the comments in sync_core()
        x86/cpu: Use XGETBV and XSETBV mnemonics in fpu/internal.h
        x86/cpu: Use SERIALIZE in sync_core() when available
      92a0610b
    • Linus Torvalds's avatar
      Merge tag 'ras_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · ca1b6692
      Linus Torvalds authored
      Pull RAS updates from Borislav Petkov:
      
       - Extend the recovery from MCE in kernel space also to processes which
         encounter an MCE in kernel space but while copying from user memory
         by sending them a SIGBUS on return to user space and umapping the
         faulty memory, by Tony Luck and Youquan Song.
      
       - memcpy_mcsafe() rework by splitting the functionality into
         copy_mc_to_user() and copy_mc_to_kernel(). This, as a result, enables
         support for new hardware which can recover from a machine check
         encountered during a fast string copy and makes that the default and
         lets the older hardware which does not support that advance recovery,
         opt in to use the old, fragile, slow variant, by Dan Williams.
      
       - New AMD hw enablement, by Yazen Ghannam and Akshay Gupta.
      
       - Do not use MSR-tracing accessors in #MC context and flag any fault
         while accessing MCA architectural MSRs as an architectural violation
         with the hope that such hw/fw misdesigns are caught early during the
         hw eval phase and they don't make it into production.
      
       - Misc fixes, improvements and cleanups, as always.
      
      * tag 'ras_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/mce: Allow for copy_mc_fragile symbol checksum to be generated
        x86/mce: Decode a kernel instruction to determine if it is copying from user
        x86/mce: Recover from poison found while copying from user space
        x86/mce: Avoid tail copy when machine check terminated a copy from user
        x86/mce: Add _ASM_EXTABLE_CPY for copy user access
        x86/mce: Provide method to find out the type of an exception handler
        x86/mce: Pass pointer to saved pt_regs to severity calculation routines
        x86/copy_mc: Introduce copy_mc_enhanced_fast_string()
        x86, powerpc: Rename memcpy_mcsafe() to copy_mc_to_{user, kernel}()
        x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list
        x86/mce: Add Skylake quirk for patrol scrub reported errors
        RAS/CEC: Convert to DEFINE_SHOW_ATTRIBUTE()
        x86/mce: Annotate mce_rd/wrmsrl() with noinstr
        x86/mce/dev-mcelog: Do not update kflags on AMD systems
        x86/mce: Stop mce_reign() from re-computing severity for every CPU
        x86/mce: Make mce_rdmsrl() panic on an inaccessible MSR
        x86/mce: Increase maximum number of banks to 64
        x86/mce: Delay clearing IA32_MCG_STATUS to the end of do_machine_check()
        x86/MCE/AMD, EDAC/mce_amd: Remove struct smca_hwid.xec_bitmap
        RAS/CEC: Fix cec_init() prototype
      ca1b6692
    • Linus Torvalds's avatar
      Merge tag 'edac_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras · a9a4b7d9
      Linus Torvalds authored
      Pull EDAC updates from Borislav Petkov:
      
       - Add Amazon's Annapurna Labs memory controller EDAC driver (Talel
         Shenhar)
      
       - New AMD CPUs support (Yazen Ghannam)
      
       - The usual misc fixes and cleanups all over the subsystem
      
      * tag 'edac_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
        EDAC/amd64: Set proper family type for Family 19h Models 20h-2Fh
        EDAC/mc_sysfs: Add missing newlines when printing {max,dimm}_location
        EDAC/aspeed: Use module_platform_driver() to simplify
        EDAC, sb_edac: Simplify switch statement
        EDAC/ti: Fix handling of platform_get_irq() error
        EDAC/aspeed: Fix handling of platform_get_irq() error
        EDAC/i5100: Fix error handling order in i5100_init_one()
        EDAC/highbank: Handover Calxeda Highbank maintenance to Andre Przywara
        EDAC/socfpga: Transfer SoCFPGA EDAC maintainership
        EDAC/thunderx: Make symbol lmc_dfs_ents static
        EDAC/al-mc-edac: Add Amazon's Annapurna Labs Memory Controller driver
        dt-bindings: EDAC: Add Amazon's Annapurna Labs Memory Controller binding
        EDAC/mce_amd: Add new error descriptions for existing types
        EDAC: Replace HTTP links with HTTPS ones
      a9a4b7d9
    • Linus Torvalds's avatar
      Merge tag 'm68k-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k · af9db1d6
      Linus Torvalds authored
      Pull m68k updates from Geert Uytterhoeven:
      
        - Conversion of the Mac IDE driver to a platform driver
      
        - Minor cleanups and fixes
      
      * tag 'm68k-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
        ide/macide: Convert Mac IDE driver to platform driver
        m68k: Replace HTTP links with HTTPS ones
        m68k: mm: Remove superfluous memblock_alloc*() casts
        m68k: mm: Use PAGE_ALIGNED() helper
        m68k: Sort selects in main Kconfig
        m68k: amiga: Clean up Amiga hardware configuration
        m68k: Revive _TIF_* masks
        m68k: Correct some typos in comments
        m68k: Use get_kernel_nofault() in show_registers()
        zorro: Fix address space collision message with RAM expansion boards
        m68k: amiga: Fix Denise detection on OCS
      af9db1d6
    • Linus Torvalds's avatar
      Merge tag 'microblaze-v5.10' of git://git.monstr.eu/linux-2.6-microblaze · 024fb667
      Linus Torvalds authored
      Pull Microblaze build warning fix from Michal Simek.
      
      * tag 'microblaze-v5.10' of git://git.monstr.eu/linux-2.6-microblaze:
        microblaze: fix kbuild redundant file warning
      024fb667
    • Linus Torvalds's avatar
      Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux · 6734e20e
      Linus Torvalds authored
      Pull arm64 updates from Will Deacon:
       "There's quite a lot of code here, but much of it is due to the
        addition of a new PMU driver as well as some arm64-specific selftests
        which is an area where we've traditionally been lagging a bit.
      
        In terms of exciting features, this includes support for the Memory
        Tagging Extension which narrowly missed 5.9, hopefully allowing
        userspace to run with use-after-free detection in production on CPUs
        that support it. Work is ongoing to integrate the feature with KASAN
        for 5.11.
      
        Another change that I'm excited about (assuming they get the hardware
        right) is preparing the ASID allocator for sharing the CPU page-table
        with the SMMU. Those changes will also come in via Joerg with the
        IOMMU pull.
      
        We do stray outside of our usual directories in a few places, mostly
        due to core changes required by MTE. Although much of this has been
        Acked, there were a couple of places where we unfortunately didn't get
        any review feedback.
      
        Other than that, we ran into a handful of minor conflicts in -next,
        but nothing that should post any issues.
      
        Summary:
      
         - Userspace support for the Memory Tagging Extension introduced by
           Armv8.5. Kernel support (via KASAN) is likely to follow in 5.11.
      
         - Selftests for MTE, Pointer Authentication and FPSIMD/SVE context
           switching.
      
         - Fix and subsequent rewrite of our Spectre mitigations, including
           the addition of support for PR_SPEC_DISABLE_NOEXEC.
      
         - Support for the Armv8.3 Pointer Authentication enhancements.
      
         - Support for ASID pinning, which is required when sharing
           page-tables with the SMMU.
      
         - MM updates, including treating flush_tlb_fix_spurious_fault() as a
           no-op.
      
         - Perf/PMU driver updates, including addition of the ARM CMN PMU
           driver and also support to handle CPU PMU IRQs as NMIs.
      
         - Allow prefetchable PCI BARs to be exposed to userspace using normal
           non-cacheable mappings.
      
         - Implementation of ARCH_STACKWALK for unwinding.
      
         - Improve reporting of unexpected kernel traps due to BPF JIT
           failure.
      
         - Improve robustness of user-visible HWCAP strings and their
           corresponding numerical constants.
      
         - Removal of TEXT_OFFSET.
      
         - Removal of some unused functions, parameters and prototypes.
      
         - Removal of MPIDR-based topology detection in favour of firmware
           description.
      
         - Cleanups to handling of SVE and FPSIMD register state in
           preparation for potential future optimisation of handling across
           syscalls.
      
         - Cleanups to the SDEI driver in preparation for support in KVM.
      
         - Miscellaneous cleanups and refactoring work"
      
      * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (148 commits)
        Revert "arm64: initialize per-cpu offsets earlier"
        arm64: random: Remove no longer needed prototypes
        arm64: initialize per-cpu offsets earlier
        kselftest/arm64: Check mte tagged user address in kernel
        kselftest/arm64: Verify KSM page merge for MTE pages
        kselftest/arm64: Verify all different mmap MTE options
        kselftest/arm64: Check forked child mte memory accessibility
        kselftest/arm64: Verify mte tag inclusion via prctl
        kselftest/arm64: Add utilities and a test to validate mte memory
        perf: arm-cmn: Fix conversion specifiers for node type
        perf: arm-cmn: Fix unsigned comparison to less than zero
        arm64: dbm: Invalidate local TLB when setting TCR_EL1.HD
        arm64: mm: Make flush_tlb_fix_spurious_fault() a no-op
        arm64: Add support for PR_SPEC_DISABLE_NOEXEC prctl() option
        arm64: Pull in task_stack_page() to Spectre-v4 mitigation code
        KVM: arm64: Allow patching EL2 vectors even with KASLR is not enabled
        arm64: Get rid of arm64_ssbd_state
        KVM: arm64: Convert ARCH_WORKAROUND_2 to arm64_get_spectre_v4_state()
        KVM: arm64: Get rid of kvm_arm_have_ssbd()
        KVM: arm64: Simplify handling of ARCH_WORKAROUND_2
        ...
      6734e20e
    • Linus Torvalds's avatar
      Merge tag 'tpmdd-next-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd · d04a248f
      Linus Torvalds authored
      Pull tpm updates from Jarkko Sakkinen:
       "Support for a new TPM device and fixes and Git URL change (infraded ->
        korg)"
      
      * tag 'tpmdd-next-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd:
        MAINTAINERS: TPM DEVICE DRIVER: Update GIT
        tpm_tis: Add a check for invalid status
        tpm: use %*ph to print small buffer
        dt-bindings: Add SynQucer TPM MMIO as a trivial device
        tpm: tis: add support for MMIO TPM on SynQuacer
      d04a248f
    • Borislav Petkov's avatar
      1dc32628
  2. 11 Oct, 2020 11 commits
  3. 10 Oct, 2020 8 commits