- 03 Nov, 2014 1 commit
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Linus Walleij authored
Merge tag 'v3.19-rockchip-pinctrl1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into devel Rockchip-pinctrl fixes from Doug Anderson and suspend-specific functions from Chris Zhong
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- 31 Oct, 2014 3 commits
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Chris Zhong authored
Save and restore the gpio6_c6 pinmux setting, since Maskrom of RK3288 would modify it to sdmmc0_det, so it need to be restored to the correct setting after resume from Maskrom. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Chris Zhong authored
support suspend/resume of pinctrl, it allows handling sleep mode for hogged pins in pinctrl Signed-off-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Varka Bhadram authored
Sanity check on resource happening with devm_ioremap_resource(). Signed-off-by: Varka Bhadram <varkab@cdac.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 30 Oct, 2014 3 commits
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Maxime Ripard authored
The A80 has a rather usual pin controller, the only thing out of the ordinary being that it has 5 interrupts banks, and that some pins have several options for the same functions. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Maxime Ripard authored
The A80 R-PIO controller has one more bank that what we've seen so far, add the PN pin bank. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Uwe Kleine-König authored
The mxs pinctrl driver cannot handle when functions are not grouped by name (which IMO is a bug). This happens for example if a imx28-somemachine.dts provides a function that has the same name as a function defined in imx28.dtsi. The proper way to fix that would be to check for duplicates in the loops (which increases parsing time) or parse the groups first and sort the resulting array. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 29 Oct, 2014 11 commits
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Doug Anderson authored
There were a few instances where the rockchip pinctrl driver would do read-modify-write with no spinlock. Add a spinlock for these cases. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Doug Anderson authored
Just like in (529301c1 pinctrl: samsung: Parse pin groups before calling pinctrl_register()), Rockchip also needs to parse pin groups earlier to make hogs work. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Doug Anderson authored
The Rockchip pinctrl driver was calling rockchip_gpio_direction_output() in the pin_config_set() callback. This was just a shortcut for: * rockchip_gpio_set() * pinctrl_gpio_direction_output() Unfortunately it's not so good to call pinctrl_gpio_direction_output() from pin_config_set(). Specifically when initting hogs you'll get an error. Let's refactor a little so we can call _rockchip_pmx_gpio_set_direction() directly. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Doug Anderson authored
The rockchip pinctrl driver uses irq_gc_set_wake() but doesn't setup the .wake_enabled member. That means that we can never actually use a pin for wakeup. When "irq_set_irq_wake()" tries to call through it will always get a failure from set_irq_wake_real() and will then set wake_depth to 0. Assuming you can resume you'll later get an error message about "Unbalanced IRQ x wake disable". Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Mika Westerberg authored
Add MAINTAINERS entry for Intel pin controller drivers. I will be maintaining them with Heikki, who kindly promised to help me with this. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mika Westerberg authored
We are going to have more pinctrl drivers for Intel hardware so separate all our pin controller drivers to own directory. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ivan T. Ivanov authored
This is the pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm MPP sub-function blocks found in the PMIC chips. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ivan T. Ivanov authored
This is the pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm GPIO sub-function blocks found in the PMIC chips. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ivan T. Ivanov authored
DeviceTree binding documentation for Qualcomm SPMI PMIC MPP pinctrl drivers. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bjorn Andersson authored
This introduced the device tree bindings for the GPIO block found in PMIC's from Qualcomm. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Alexandre Belloni authored
Copy the mach/at91_pio.h header locally and use it for pinctrl-at91.c. This allows to remove the dependency on mach/at91_pio.h to be able to move at91 to multiplatform. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 28 Oct, 2014 5 commits
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Varka Bhadram authored
Sanity check on resource happening with devm_ioremap_resource(). Signed-off-by: Varka Bhadram <varkab@cdac.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Soren Brinkmann authored
When dumping pinconf information in debugfs, config arguments are only printed when a unit is present and the argument is != 0. For parameters like the slew rate, this does not work. The slew rate uses a driver specific format for the argument, i.e. 0 can be a valid argument and a unit is not provided for it. For that reason, add a flag to enable printing the argument instead of inferring it from the presence of a unit and the value of the argument. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Thierry Reding authored
The pinctrl config helpers make a separate copy of the configuration, so callers must make sure to free any dynamically allocated memory that was used to store it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Felipe Balbi authored
pinctrl-baytrail driver provides a proper ->remove() method on its platform_driver definition, however there's no way, currently, to unload the driver due to missing module_exit(). This patch adds module_exit(). Signed-off-by: Felipe Balbi <balbi@ti.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stefan Agner authored
Add pinmux support for GPIO for Vybrid (vf610) IOMUX controller. This is needed since direction configuration is not part of the GPIO module in Vybrid. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 21 Oct, 2014 1 commit
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Pramod Gurav authored
This change fixes below sparse error, drivers/pinctrl/pinctrl-st.c:1515:31: error: incompatible types for operation (>) drivers/pinctrl/pinctrl-st.c:1515:31: left side has type void [noderef] <asn:2>*irqmux_base drivers/pinctrl/pinctrl-st.c:1515:31: right side has type int Cc: Maxime Coquelin <maxime.coquelin@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> CC: Linus Walleij <linus.walleij@linaro.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 20 Oct, 2014 10 commits
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Linus Walleij authored
There is a missing MMC/SD pin for MCDATDIR2 which is routed as alt B, add it to the MMC/SD pin group and functions. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is generic pin configuration, so add .is_generic. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
After force converting the ABx500 bindings in the driver and device tree sources, also update the binding documentation to state that we are now using standard bindings. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The abx500 pin control driver supported a method of fetching the generic config from a phandle to a separate node using the "ste,config" as a phandle. This is not used in any device trees and not documented in the bindings, so drop this support. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This converts the ABx500 pin controller and all associated device trees to use the standard, generic config bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This converts the Nomadik pin controller and all associated device trees to use the standard, generic config bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This converts the ABx500 pin controller and all associated device trees to use the standard, generic mux bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This converts the Nomadik pin controller and all associated device trees to use the standard, generic mux bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "A batch of fixes that have come in during the merge window. Some of them are defconfig updates for things that have now landed, some errata additions and a few general scattered fixes. There's also a qcom DT update that adds support for SATA on AP148, and basic support for Sony Xperia Z1 and CM-QS600 platforms that seemed isolated enough that we could merge it even if it's late" * tag 'arm-soc-fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: corrected bcm2835 search ARM: dts: Explicitly set dr_mode on exynos5420-arndale-octa ARM: dts: Explicitly set dr_mode on exynos Peach boards ARM: dts: qcom: add CM-QS600 board ARM: dts: qcom: Add initial DTS file for Sony Xperia Z1 phone ARM: dts: qcom: Add SATA support on IPQ8064/AP148 MAINTAINERS: Update Santosh Shilimkar's email id ARM: sunxi_defconfig: enable CONFIG_REGULATOR ARM: dts: Disable smc91x on n900 until bootloader dependency is removed ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3 ARM: exynos_defconfig: enable USB gadget support ARM: exynos_defconfig: Enable Maxim 77693 and I2C GPIO drivers ARM: mm: Fix ifdef around cpu_*_do_[suspend, resume] ops ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=n ARM: SAMSUNG: Restore Samsung PM Debug functionality ARM: dts: Fix pull setting in sd4_width8 pin group for exynos4x12 ARM: exynos_defconfig: Enable SBS battery support ARM: exynos_defconfig: Enable Control Groups support ARM: exynos_defconfig: Enable Atmel maXTouch support ARM: exynos_defconfig: Enable MAX77802
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- 19 Oct, 2014 6 commits
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git://git.infradead.org/users/eparis/auditLinus Torvalds authored
Pull audit updates from Eric Paris: "So this change across a whole bunch of arches really solves one basic problem. We want to audit when seccomp is killing a process. seccomp hooks in before the audit syscall entry code. audit_syscall_entry took as an argument the arch of the given syscall. Since the arch is part of what makes a syscall number meaningful it's an important part of the record, but it isn't available when seccomp shoots the syscall... For most arch's we have a better way to get the arch (syscall_get_arch) So the solution was two fold: Implement syscall_get_arch() everywhere there is audit which didn't have it. Use syscall_get_arch() in the seccomp audit code. Having syscall_get_arch() everywhere meant it was a useless flag on the stack and we could get rid of it for the typical syscall entry. The other changes inside the audit system aren't grand, fixed some records that had invalid spaces. Better locking around the task comm field. Removing some dead functions and structs. Make some things static. Really minor stuff" * git://git.infradead.org/users/eparis/audit: (31 commits) audit: rename audit_log_remove_rule to disambiguate for trees audit: cull redundancy in audit_rule_change audit: WARN if audit_rule_change called illegally audit: put rule existence check in canonical order next: openrisc: Fix build audit: get comm using lock to avoid race in string printing audit: remove open_arg() function that is never used audit: correct AUDIT_GET_FEATURE return message type audit: set nlmsg_len for multicast messages. audit: use union for audit_field values since they are mutually exclusive audit: invalid op= values for rules audit: use atomic_t to simplify audit_serial() kernel/audit.c: use ARRAY_SIZE instead of sizeof/sizeof[0] audit: reduce scope of audit_log_fcaps audit: reduce scope of audit_net_id audit: arm64: Remove the audit arch argument to audit_syscall_entry arm64: audit: Add audit hook in syscall_trace_enter/exit() audit: x86: drop arch from __audit_syscall_entry() interface sparc: implement is_32bit_task sparc: properly conditionalize use of TIF_32BIT ...
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Olof Johansson authored
Merge tag 'qcom-dt-for-3.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into fixes Merge "qcom DT changes for v3.18-3" from Kumar Gala: Qualcomm ARM Based Device Tree Updates for v3.18-3 * Added Board support for CM-QS600 and Sony Xperia Z1 phone * Added SATA support on IPQ8064/AP148 * tag 'qcom-dt-for-3.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: dts: qcom: add CM-QS600 board ARM: dts: qcom: Add initial DTS file for Sony Xperia Z1 phone ARM: dts: qcom: Add SATA support on IPQ8064/AP148
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Olof Johansson authored
Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes Pull more fixes from Kukjin Kim: 2nd Samsung fixes for v3.18 - Explicitly set dr_mode on exynos5800-peach-pi, exynos5420-peach-pit and exynos5420-arndale-octa boards, because the USB dwc3 controller will not work properly without dr_mode as host on above boards if the USB host and gadget are enabled in kernel configuration both. * tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Explicitly set dr_mode on exynos5420-arndale-octa ARM: dts: Explicitly set dr_mode on exynos Peach boards Signed-off-by: Olof Johansson <olof@lixom.net>
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Scott Branden authored
Corrected bcm2835 maintainer info by using N: to specify any files with bcm2835 in are directed to the proper maintainer. Also corrected minor mispelling of ARCHITECTURE in 2 comment locations. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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git://github.com/jonmason/ntbLinus Torvalds authored
Pull ntb (non-transparent bridge) updates from Jon Mason: "Add support for Haswell NTB split BARs, a debugfs entry for basic debugging info, and some code clean-ups" * tag 'ntb-3.18' of git://github.com/jonmason/ntb: ntb: Adding split BAR support for Haswell platforms ntb: use errata flag set via DID to implement workaround ntb: conslidate reading of PPD to move platform detection earlier ntb: move platform detection to separate function NTB: debugfs device entry
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linuxLinus Torvalds authored
Pull i2c updates from Wolfram Sang: "Highlights from the I2C subsystem for 3.18: - new drivers for Axxia AM55xx, and Hisilicon hix5hd2 SoC. - designware driver gained AMD support, exynos gained exynos7 support The rest is usual driver stuff. Hopefully no lowlights this time" * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: i801: Add Device IDs for Intel Sunrise Point PCH i2c: hix5hd2: add i2c controller driver i2c-imx: Disable the clock on probe failure i2c: designware: Add support for AMD I2C controller i2c: designware: Rework probe() to get clock a bit later i2c: designware: Default to fast mode in case of ACPI i2c: axxia: Add I2C driver for AXM55xx i2c: exynos: add support for HSI2C module on Exynos7 i2c: mxs: detect No Slave Ack on SELECT in PIO mode i2c: cros_ec: Remove EC_I2C_FLAG_10BIT i2c: cros-ec-tunnel: Add of match table i2c: rcar: remove sign-compare flaw i2c: ismt: Use minimum descriptor size i2c: imx: Add arbitration lost check i2c: rk3x: Remove unlikely() annotations i2c: rcar: check for no IRQ in rcar_i2c_irq() i2c: rcar: make rcar_i2c_prepare_msg() *void* i2c: rcar: simplify check for last message i2c: designware: add support of platform data to set I2C mode i2c: designware: add support of I2C standard mode
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