- 04 Nov, 2014 1 commit
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Koji Matsuoka authored
Signed-off-by:
Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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- 30 Oct, 2014 39 commits
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Geert Uytterhoeven authored
The SATA node used the generic compatible property only, which was deprecated by commit e67adb4e ("sata_rcar: Add R-Car Gen2 SATA PHY support"). Add the SoC-specific one introduced by that commit. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Laurent Pinchart authored
Add references to the transmit and receive DMA channels in the MMCIF node. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
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Laurent Pinchart authored
Add references to the transmit and receive DMA channels in the two MMCIF nodes. Signed-off-by:
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Laurent Pinchart authored
Add the MMCIF0 device to the r8a7791 device tree. Signed-off-by:
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Laurent Pinchart authored
Node names should describe the function of the device, not its IP core name. Signed-off-by:
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Geert Uytterhoeven authored
The TMU timers used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by:
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Geert Uytterhoeven authored
The CMT1 timer used the generic compatible property only. Add the SoC-specific one, which is already documented, to make it future proof. Signed-off-by:
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Yoshihiro Shimoda authored
Enable HS-USB device for the Henninger board, defining the GPIO that the driver should check when probing (which is the ID output from MAX3355 OTG chip). Note that there will be pinctrl-related error messages if both internal PCI and HS-USB drivers are enabled but they should be just ignored. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [Sergei: added pin function/group and prop, moved device node, fixed summary, added changelog] Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
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Yoshihiro Shimoda authored
Enable HS-USB device for the Koelsch board, defining the GPIO that the driver should check when probing (which is the ID output from MAX3355 OTG chip). Note that there will be pinctrl-related error messages if both internal PCI and HS-USB drivers are enabled but they should be just ignored. Signed-off-by:
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Yoshihiro Shimoda authored
Define the R8A7791 generic part of the HS-USB device node. It is up to the board file to enable the device. Signed-off-by:
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Yoshihiro Shimoda authored
Enable HS-USB device for the Lager board, defining the GPIO that the driver should check when probing. Since this board doesn't have the OTG ID pin, we assume that GP5_18 (USB0_PWEN) is an ID pin because it is 1 when the SW5 is in position 2-3 (meaning USB function) and 0 in other positions. Note that there will be pinctrl-related error messages if both internal PCI and HS-USB drivers are enabled but they should be just ignored. Signed-off-by:
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Yoshihiro Shimoda authored
Define the R8A7790 generic part of the HS-USB device node. It is up to the board file to enable the device. Signed-off-by:
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Yoshihiro Shimoda authored
Signed-off-by:
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Yoshihiro Shimoda authored
Since the PHY of USB3.0 and EHCI/OHCI ch2 are the same, the USB3.0 driver cannot use the phy driver when the EHCI/OHCI ch2 already used it: phy phy-e6590100.usb-phy.3: phy init failed --> -16 xhci-hcd: probe of ee000000.usb failed with error -16 If so, we have to unbind the EHCI/OHCI ch2, and then we have to bind the USB3.0 driver as the following: echo 0000:02:02.0 > /sys/bus/pci/drivers/ehci-pci/unbind echo 0000:02:01.0 > /sys/bus/pci/drivers/ohci-pci/unbind echo ee000000.usb > /sys/bus/platform/drivers/xhci-hcd/bind Note that there will be pinctrl-related error messages if both internal PCI and USB3.0 are enabled but they should be just ignored: sh-pfc e6060000.pfc: pin GP_5_22 already requested by ee0d0000.pci; cannot claim for ee000000.usb sh-pfc e6060000.pfc: pin-182 (ee000000.usb) status -22 ata1: SATA link down (SStatus 0 SControl 300) sh-pfc e6060000.pfc: could not request pin 182 (GP_5_22) from group usb2 on device sh-pfc Signed-off-by:
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Yoshihiro Shimoda authored
Signed-off-by:
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Hisashi Nakamura authored
Signed-off-by:
Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by:
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Simon Horman authored
Initialise TMU device using DT when booting bockw using DT-reference. Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Simon Horman authored
This describes all of the TMU hardware of the r8a7778. Each node is disabled and may be enabled as necessary by board DTS files. Acked-by:
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Geert Uytterhoeven authored
ch0 will be used for clock events and for periodic clock events, ch1 will be used as clock source. Signed-off-by:
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Geert Uytterhoeven authored
Signed-off-by:
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Yoshifumi Hosoya authored
Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by:
Yoshihiro Kaneko <ykaneko0929@gmail.com> Acked-by:
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Yoshifumi Hosoya authored
Signed-off-by:
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Kouei Abe authored
Signed-off-by:
Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by:
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Kouei Abe authored
Signed-off-by:
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Geert Uytterhoeven authored
The clocks property for the scifa2 device node referred to the scifa0 clock index instead of the scifa2 clock index. Signed-off-by:
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Wolfram Sang authored
SCIF and SCIFA can be plexed onto the same wires on Lager board. The datasheet also describes the wires as SCIFA. So, to make use of the bigger FIFOs switch to SCIFA instead. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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Sergei Shtylyov authored
Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device. Signed-off-by:
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Sergei Shtylyov authored
Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device. Based on the original work by Ben Dooks <ben.dooks@codethink.co.uk>. Signed-off-by:
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Sergei Shtylyov authored
Enable USB PHY device for the Henninger board. Signed-off-by:
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Sergei Shtylyov authored
Enable USB PHY device for the Koelsch board. Signed-off-by:
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Sergei Shtylyov authored
Define the R8A7791 generic part of the USB PHY device node. It is up to the board file to enable the device. Signed-off-by:
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Sergei Shtylyov authored
Enable USB PHY device for the Lager board. Signed-off-by:
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Sergei Shtylyov authored
Define the R8A7790 generic part of the USB PHY device node. It is up to the board file to enable the device. Signed-off-by:
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Geert Uytterhoeven authored
This clock drives the INTCA irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. Signed-off-by:
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Simon Horman authored
Renesas ARM Based SoC r8a73a4 DT Timers Updates for v3.19 * Initialise CMT1 timer using DT
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Laurent Pinchart authored
Specify the DU output topology, enable the DU device and configure the related pins. Signed-off-by:
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Laurent Pinchart authored
The DU device is now instantiated from the device tree, remove the corresponding platform device. Signed-off-by:
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Laurent Pinchart authored
Specify the DU output topology, enable the DU device and configure the related pins. Signed-off-by:
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Laurent Pinchart authored
The DU device is now instantiated from the device tree, remove the corresponding platform device. Signed-off-by:
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