- 04 Dec, 2006 40 commits
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Dwayne Grant McConnell authored
We need to check the channel count of the signal notification registers before reading them, because it can be undefined when the count is zero. In order to read count and data atomically, we read from the saved context. This patch uses spu_acquire_saved() to force a context save before a /signal1 or /signal2 read. Because of this it is no longer necessary to have backing_ops and hw_ops versions of this function so they have been removed. Regular applications should not rely on reading this register to be fast, as it's conceptually a write-only file from the PPE perspective. Signed-off-by:
Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by:
Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Dwayne Grant McConnell authored
This patch implements read only access to /mbox_info - SPU Write Outbound Mailbox /ibox_info - SPU Write Outbound Interrupt Mailbox /wbox_info - SPU Read Inbound Mailbox These files are used by gdb in order to look into the current mailbox queues without changing the contents at the same time. They are not meant for general programming use, since the access requires a context save and is therefore rather slow. It would be good to complement this patch with one that adds write support as well. Signed-off-by:
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Dwayne Grant McConnell authored
This patch removes the /spu_tag_mask file from spufs. The data provided by this file is also available from the /dma_info file in the dma_info_mask of the spu_dma_info struct. The file was intended to be used by gdb, but that never used it, and now it has been replaced with the more verbose dma_info file. Signed-off-by:
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Dwayne Grant McConnell authored
The /lslr file gives read access to the SPU_LSLR register in hex; 0x3fff for example The /dma_info file provides read access to the SPU Command Queue in a binary format. The /proxydma_info files provides read access access to the Proxy Command Queue in a binary format. The spu_info.h file provides data structures for interpreting the binary format of /dma_info and /proxydma_info. Signed-off-by:
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Dwayne Grant McConnell authored
This patches changes /npc, /decr, /decr_status, /spu_tag_mask, /event_mask, /event_status, and /srr0 files to provide output according to the format string "0x%llx" instead of "%llx". Before this patch some files used "0x%llx" and other used "%llx" which is inconsistent and potentially confusing. A user might assume "%llx" numbers were decimal if they happened to not contain any a-f digits. This change will break any code cannot tolerate a leading 0x in the file contents. The only known users of these files are the libspe but there might also be some scripts which access these files. This risk is deemed acceptable for future consistency. Signed-off-by:
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Geoff Levand authored
Change the definition of powerpc's cond_syscall() to use the standard gcc weak attribute specifier which provides proper support for C linkage as needed by spu_syscall_table[]. Fixes this powerpc build error with CONFIG_SPU_FS=y, CONFIG_PPC_RTAS=n: arch/powerpc/platforms/built-in.o: undefined reference to `ppc_rtas' Signed-off-by:
Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by:
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Kalle Pokki authored
The SCC parameter RAM areas are mapped wrong in MPC8xx device descriptions. All memory areas overlap with the next one, so that I2C, SPI, SMC1 and SMC2 cannot be enabled if the four SCCs are. Signed-off-by:
Kalle Pokki <kalle.pokki@iki.fi> Acked-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
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Geert Uytterhoeven authored
Signed-off-by:
Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by:
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Grant Likely authored
arch/powerpc/sysdev/mpc52xx_pic.c breaks the ppc build Signed-off-by:
Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
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Adrian Cox authored
The patch below fixes an arithmetic wrap-around issue on 32bit machines using smp-tbsync. Without this patch a timebase value over 0x000000007fffffff will hang the boot process while bringing up secondary CPUs. Signed-off-by:
Adrian Cox <adrian@humboldt.co.uk> Signed-off-by:
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David Gibson authored
This makes 2 changes to clean up the flat device tree handling logic in the zImage wrapper. First, there were two callbacks from the dt_ops structure used for producing a final flat tree to pass to the kerne: dt_ops.ft_pack() which packed the flat tree (possibly a no-op) and dt_ops.ft_addr() which retreived the address of the final blob. Since they were only ever called together, this patch combines the two into a single new callback, dt_ops.finalize(). This new callback does whatever platform-dependent things are necessary to produce a final flat device tree blob, and returns the blob's addres. Second, the current logic calls the kernel with a flat device tree if one is build into the zImage wrapper, otherwise it boots the kernel with a PROM pointer, expecting the kernel to copy the OF device tree itself. This approach precludes the possibility of the platform wrapper code building a flat device tree from whatever platform-specific information firmware provides. Thus, this patch takes the more sensible approach of invoking the kernel with a flat tree if the dt_ops.finalize callback provides one (by whatever means). So, the dt_ops.finalize callback can be NULL, or can be a function which returns NULL. In either case, the zImage wrapper logic assumes that this is a platform with OF and invokes the kernel accordingly. Signed-off-by:
David Gibson <dwg@au1.ibm.com> Signed-off-by:
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David Gibson authored
This patch makes the handling of the initrd (or initramfs) in the zImage wrapper a little easier to follow. Instead of passing the initrd addresses out from prep_kernel() via the cryptic a1 and a2 parameters, use the global struct add_range, 'initrd'. prep_kernel() already passes information through the 'vmlinux' addr_range struct, so this seems like a reasonable extension. Some comments also clarify the logic with prep_kernel(): we use an initrd included in the zImage if present, otherwise we use an initrd passed in by the bootloader in the a1 and a2 parameters (yaboot, at least, uses this mechanism to pass an initrd). Signed-off-by:
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Benjamin Herrenschmidt authored
This is a small driver for the Xserve G5 CPU-meter blue LEDs on the front-panel. It might work on the Xserve G4 as well though that was not tested. It's pretty basic and could use some improvements if somebody cares doing them. :) Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Linas Vepstas authored
Per email discussion, it appears that rtas_stop_self() and pSeries_mach_cpu_die() should not be compiled if CONFIG_HOTPLUG_CPU is not defined. This patch adds #ifdefs around these bits of code. Signed-off-by:
Linas Vepstas <linas@austin.ibm.com> Signed-off-by:
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Zang Roy-r61911 authored
The following patch adds a tsi108/9 pci interrupt controller host. On mpc7448hpc2 board, pci_irq_fixup function is removed, which makes the pci_read_irq_line be the default pci irq fixup. Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Signed-off-by:
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Kalle Pokki authored
The below hunk was missed from the recent patch, and now, there are somewhat inconsistent definitions: in cpm_uart.h: int __init cpm_uart_init_portdesc(void); in cpm_uart_cpm1.c: int __init cpm_uart_init_portdesc(void) { } in cpm_uart_cpm2.c: int cpm_uart_init_portdesc(void) { } Signed-off-by:Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by:
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Wojtek Kaniewski authored
Fix compilation without PCI support for Bubinga, CPCI405 and EP405. bios_fixup() for these boards uses functions available only with CONFIG_PCI, so linker fails. Signed-off-by:
Wojtek Kaniewski <wojtekka@toxygen.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
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nkalmala authored
PPC/booke reg MCSR value misquoted Signed-off-by:
nkalmala <nkalmala@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Hugh Dickins authored
Rewrite local_get_flags and local_irq_disable to use r13 explicitly, to avoid the risk that gcc will split get_paca()->soft_enabled into a sequence unsafe against preemption. Similar care in local_irq_restore. Signed-off-by:
Hugh Dickins <hugh@veritas.com> Signed-off-by:
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Stephen Rothwell authored
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Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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Stephen Rothwell authored
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Stephen Rothwell authored
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Stephen Rothwell authored
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Stephen Rothwell authored
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Stephen Rothwell authored
On error, make sure that we undo all necessary operations. This also gets rid of a must_check warning. Signed-off-by:
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Benjamin Herrenschmidt authored
The recent IO accessor changes broke IDE on arch/ppc due to the IDE stream IO macros using the new reads/writes{b,w,l} accessors that are only defined for arch/powerpc. This adds them to arch/ppc. Signed-off-by: -
Benjamin Herrenschmidt authored
The new IO accessor code allows to stick a token in the top bit of MMIO addresses which gets masked out during actual accesses. However, the __raw_* accessors forgot to mask it out. This fixes it. Signed-off-by:
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Benjamin Herrenschmidt authored
powerpc: Merge 32 and 64 bits asm-powerpc/io.h The rework on io.h done for the new hookable accessors made it easier, so I just finished the work and merged 32 and 64 bits io.h for arch/powerpc. arch/ppc still uses the old version in asm-ppc, there is just too much gunk in there that I really can't be bothered trying to cleanup. Signed-off-by:
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Benjamin Herrenschmidt authored
In order to suppose platforms with devices above 4Gb on 32 bits platforms with a >32 bits physical address space, we used to have a special ioremap64 along with a fixup routine fixup_bigphys_addr. This shouldn't be necessary anymore as struct resource now supports 64 bits addresses even on 32 bits archs. This patch enables that option when CONFIG_PHYS_64BIT is set and removes ioremap64 and fixup_bigphys_addr. This is a preliminary work for the upcoming merge of 32 and 64 bits io.h Signed-off-by:
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Jeremy Kerr authored
This patch adds full cell iommu support (and iommu disabled mode). It implements mapping/unmapping of iommu pages on demand using the standard powerpc iommu framework. It also supports running with iommu disabled for machines with less than 2GB of memory. (The default is off in that case, though it can be forced on with the kernel command line option iommu=force). Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
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Benjamin Herrenschmidt authored
Now that the direct DMA ops supports an offset, we use that instead of defining our own. Signed-off-by:
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Benjamin Herrenschmidt authored
This patch makes dma_alloc_coherent() use node local allocation when using the direct DMA ops. The node is obtained from the new device extension. If no such extension is present, the current node is used. Signed-off-by:
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Benjamin Herrenschmidt authored
This patch adds an optional global offset that can be added to DMA addresses when using the direct DMA operations. That brings it a step closer to the 32 bits direct DMA operations, and makes it useable on Cell when the MMU is disabled and we are using a spider southbridge. Signed-off-by:
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Benjamin Herrenschmidt authored
We use the powerpc specific low level MMIO accessor variants instead of readl() or readl_be() because we know spidernet is not a real PCI device and we can thus avoid the performance hit caused by the PCI workarounds. Signed-off-by:
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Benjamin Herrenschmidt authored
This patch implements a workaround for a Spider PCI host bridge bug where it doesn't enforce some of the PCI ordering rules unless some manual manipulation of a special register is done. In order to be fully compliant with the PCI spec, I do this on every MMIO read operation. Signed-off-by:
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Benjamin Herrenschmidt authored
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO and PIO) and provides a generic way for other platforms to do so (we have need to do that for various other platforms). While reworking the IO ops, I ended up doing some spring cleaning in io.h and eeh.h which I might want to split into 2 or 3 patches (among others, eeh.h had a lot of useless stuff in it). A side effect is that EEH for PIO should work now (it used to pass IO ports down to the eeh address check functions which is bogus). Also, new are MMIO "repeat" ops, which other archs like ARM already had, and that we have too now: readsb, readsw, readsl, writesb, writesw, writesl. In the long run, I might also make EEH use the hooks instead of wrapping at the toplevel, which would make things even cleaner and relegate EEH completely in platforms/iseries, but we have to measure the performance impact there (though it's really only on MMIO reads) Since I also need to hook on ioremap, I shuffled the functions a bit there. I introduced ioremap_flags() to use by drivers who want to pass explicit flags to ioremap (and it can be hooked). The old __ioremap() is still there as a low level and cannot be hooked, thus drivers who use it should migrate unless they know they want the low level version. The patch "arch provides generic iomap missing accessors" (should be number 4 in this series) is a pre-requisite to provide full iomap API support with this patch. Signed-off-by:
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Benjamin Herrenschmidt authored
This patch makes the Cell DMA code work on both the Spider and the Axon south bridges by turning cell_dma_valid into a variable instead of a constant. This is a temporary patch until we have full iommu support. Signed-off-by:
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Benjamin Herrenschmidt authored
When enabled in Kconfig, it will pick up any of_platform_device matching it's match list (currently type "pci", "pcix", "pcie", or "ht" and setup a PHB for it. Platform must provide a ppc_md.pci_setup_phb() for it to work (for doing the necessary initialisations specific to a given PHB like setting up the config space ops). It's currently only available on 64 bits as the 32 bits PCI code can't quite cope with it in it's current form. I will fix that later. Signed-off-by:
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Benjamin Herrenschmidt authored
Add a "parent" struct device to our PCI host bridge data structure so that PCI can be rooted off another device in sysfs. Note that arch/ppc doesn't use it, only arch/powerpc, though it's available for both 32 and 64 bits. Signed-off-by:
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Benjamin Herrenschmidt authored
The BUID is the first entry of a PCI host bridge "reg" property. Now that PCI busses can be anywhere in the device-tree, we need to fully translate the value there to a CPU physical address before we can use it with RTAS. Signed-off-by:
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