Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

With some memory model other than FLATMEM, the single node can
contains some holes so there might be many invalid pages.  For
example, with two 256M memory and one 256M hole, some variables
(num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will
indicate that there are 768MB on this system.  This is not desired
because, for example, alloc_large_system_hash() allocates too many
entries.
    
Use free_area_init_node() with counted zholes_size[] instead of
free_area_init().

For num_physpages, use number of ram pages instead of max_low_pfn.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1. MIPS should select SPARSEMEM_STATIC since allocating bootmem in
   memory_present() will corrupt bootmap area.
2. pfn_valid() for SPARSEMEM is defined in linux/mmzone.h
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

this patch restores the behaviour of the old (assembly-written)
interrupt handler, the handler is left as soon as a single interrupt
cause is handled.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

There should never be a FP exception in kernel mode.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Domen Puncer <domen.puncer@ultra.si>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

The appended patch drops the inline for decode_configs, this saves about
2k of text size.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This might be helpfull to debug sparsemem on mips.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This might be helpfull to debug sparsemem on mips.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

> #define hw_interrupt_type       irq_chip
> typedef struct irq_chip         hw_irq_controller;
> #define no_irq_type             no_irq_chip
> typedef struct irq_desc         irq_desc_t;
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Make the MT handler silent and output the MT exception type at debug
priority.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This fixes the "not syncing: Could not identify cpu/level ..." panic
when a PCI irq is requested the second time.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

On the 34K where multiple virtual processors are implemented in a single
core and share a single TLB, interprocessor function calls are not needed
to flush a cache, so avoid them.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

mm/slab.c uses nested locking when dealing with 'off-slab'
caches, in that case it allocates the slab header from the
(on-slab) kmalloc caches. Teach the lock validator about
this by putting all on-slab caches into a separate class.

this patch has no effect on non-lockdep kernels.
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

undo existing mm/slab.c lock-validator annotations, in preparation
of a new, less intrusive annotation patch.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

* HEAD:
  [SPARC]: Fix OF register translations under sub-PCI busses.
  [SPARC64]: Refine Sabre wsync logic.
  [SERIAL] sunsu: Handle keyboard and mouse ports directly.
  [SPARC64]: Fix 2 bugs in sabre_irq_build()
  [SPARC64]: Update defconfig.
  [SPARC64]: Fix make headers_install
  [SPARC64]: of_device_register() error checking fix

Keep the result holder variable the same type as the quantity we are
retreiving in the get_user() macro - don't go through a pointer version
of the user space address type.

Using the address type causes problems if the address type was const
(newer versions of gcc quite rightly error out for that condition).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

include/asm-i386/system.h has trailing semicolons in some of the
macros that cause legitimate code to fail compilation, so remove
them. Also remove extra blank lines within one group of macros.

And put stts() and clts() back together; they got separated somehow.
Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value.  For
certain kinds of things below PCI this isn't necessarily true.

Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:

    Node 0xf005f1e0
        ranges:      00000000.00000000.00000000.000001fe.01000000.00000000.01000000
                     01000000.00000000.00000000.000001fe.02000000.00000000.01000000
                     02000000.00000000.00000000.000001ff.00000000.00000001.00000000
                     03000000.00000000.00000000.000001ff.00000000.00000001.00000000
        device_type:  'pci'
        model:  'SUNW,sabre'

        Node 0xf005f9d4
            device_type:  'pci'
            model:  'SUNW,simba'

           Node 0xf0060d24
                ranges:  00000010.00000000 82010810.00000000.f0000000 01000000
			 00000014.00000000 82010814.00000000.f1000000 00800000
                name:  'ebus'

                Node 0xf0062dac
                    reg:  00000014.003083f8.00000008 --> 0x1ff.f13083f8
                    device_type:  'serial'
                    name:  'su'

So the correct translation here is:

1) Match "su" register to second ranges entry of 'ebus', which translates
   into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
   gives us "82010814.00000000.f13083f8".

2) Pass-through "SUNW,simba" since it lacks ranges property

3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
   controller node 'SUNW,sabre', and we arrive at the final physical
   MMIO address of "0x1fff13083f8".

Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.

It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work.  That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.

It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>

It is only needed when there is a PCI-PCI bridge sitting
between the device and the PCI host controller which is
not a Simba APB bridge.

Add logic to handle two special cases:

1) device behind EBUS, which sits on PCI
2) PCI controller interrupts
Signed-off-by: David S. Miller <davem@davemloft.net>

The sunsu_ports[] array exists merely to be able to easily
use an integer index to get at the proper serial console
port struct.

We size this only for real ports, not for the keyboard and
mouse, and thus keyboard and mouse port registration would
fail.

Fix this by dynamically allocating the port struct for the
keyboard and mouse, instead of using the sunsu_ports[]
array.
Signed-off-by: David S. Miller <davem@davemloft.net>

When installing the IRQ pre-handler, we were not setting up the second
argument correctly.  It should be a pointer to the sabre_irq_data, not
the config space PIO address.

Furthermore, we only need this pre-handler installed if the device
sits behind a PCI bridge that is not Sabre or Simba/APB.
Signed-off-by: David S. Miller <davem@davemloft.net>

Signed-off-by: David S. Miller <davem@davemloft.net>

A minor typo in the include/asm-sparc64/Kbuild file prevents the make
headers_install from building a useful tree of kernel headers for
sparc64.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Tom "spot" Callaway <tcallawa@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>