- 29 Nov, 2016 40 commits
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yangbo lu authored
Add maintainer entry for Freescale SoC drivers including the QE library and the GUTS driver now. Also add maintainer for QE library. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Acked-by:
Scott Wood <oss@buserror.net> Acked-by:
Qiang Zhao <qiang.zhao@nxp.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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yangbo lu authored
The global utilities block controls power management, I/O device enabling, power-onreset(POR) configuration monitoring, alternate function selection for multiplexed signals,and clock control. This patch adds a driver to manage and access global utilities block. Initially only reading SVR and registering soc device are supported. Other guts accesses, such as reading RCW, should eventually be moved into this driver as well. Signed-off-by:
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yangbo lu authored
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/ since it's used by not only PowerPC but also ARM. And add a specification for 'little-endian' property. Signed-off-by:
Rob Herring <robh@kernel.org> Acked-by:
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yangbo lu authored
Add the dts node for device configuration unit that provides general purpose configuration and status for the device. Signed-off-by:
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Ulf Hansson authored
Merge the immutable soc-device-match-tag1 provided by Geert Uytterhoeven to pull in the new soc_device_match() interface for matching against soc_bus attributes.
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Simon Horman authored
Simply document new compatibility strings as the driver is already activated using a fallback compatibility string. These compat strings are in keeping with those for all other Renesas ARM based SoCs with sh_mmcif enabled in mainline. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Simon Horman authored
Remove documentation of support for the SH7372 (SH-Mobile AP4) from the MMC driver. The driver itself appears to have no SH7372 specific code. Commit edf41009 ("ARM: shmobile: sh7372 dtsi: Remove Legacy file") removes this SoC from the kernel in v4.1. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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Linus Walleij authored
I've had it with this code now. The packed command support is a complex hurdle in the MMC/SD block layer, around 500+ lines of code which was introduced in 2013 in commit ce39f9d1 ("mmc: support packed write command for eMMC4.5 devices") commit abd9ac14 ("mmc: add packed command feature of eMMC4.5") ...and since then it has been rotting. The original author of the code has disappeared from the community and the mail address is bouncing. For the code to be exercised the host must flag that it supports packed commands, so in mmc_blk_prep_packed_list() which is called for every single request, the following construction appears: u8 max_packed_rw = 0; if ((rq_data_dir(cur) == WRITE) && mmc_host_packed_wr(card->host)) max_packed_rw = card->ext_csd.max_packed_writes; if (max_packed_rw == 0) goto no_packed; This has the following logical deductions: - Only WRITE commands can really be packed, so the solution is only half-done: we support packed WRITE but not packed READ. The packed command support has not been finalized by supporting reads in three years! - mmc_host_packed_wr() is just a static inline that checks host->caps2 & MMC_CAP2_PACKED_WR. The problem with this is that NO upstream host sets this capability flag! No driver in the kernel is using it, and we can't test it. Packed command may be supported in out-of-tree code, but I doubt it. I doubt that the code is even working anymore due to other refactorings in the MMC block layer, who would notice if patches affecting it broke packed commands? No one. - There is no Device Tree binding or code to mark a host as supporting packed read or write commands, just this flag in caps2, so for sure there are not any DT systems using it either. It has other problems as well: mmc_blk_prep_packed_list() is speculatively picking requests out of the request queue with blk_fetch_request() making the MMC/SD stack harder to convert to the multiqueue block layer. By this we get rid of an obstacle. The way I see it this is just cruft littering the MMC/SD stack. Cc: Namjae Jeon <namjae.jeon@samsung.com> Cc: Maya Erez <qca_merez@qca.qualcomm.com> Acked-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Linus Walleij authored
The void (*pre_req) callback in the struct mmc_host_ops vtable is passing an argument "is_first_req" indicating whether this is the first request or not. None of the in-kernel users use this parameter: instead, since they all just do variants of dma_map* they use the DMA cookie to indicate whether a pre* callback has already been done for a request when they decide how to handle it. Delete the parameter from the callback and all users, as it is just pointless cruft. Signed-off-by:
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Ulf Hansson authored
According to the JEDEC specification, during bus timing change operations for mmc, sending a CMD13 could trigger CRC errors. As switching to HS DDR mode indeed causes a bus timing change, polling with CMD13 to detect card busy, may thus potentially trigger CRC errors. Currently these errors are treated as the switch to HS DDR mode failed. To improve this behaviour, let's instead tell __mmc_switch() to retry when it encounters CRC errors during polling. Moreover, when switching to HS DDR mode, let's make sure the CMD13 polling is done by having the mmc host and the mmc card, being configured to operate at the same selected bus speed timing. Fix this by providing MMC_TIMING_MMC_DDR52 as the timing parameter to __mmc_switch(). Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com>
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Ulf Hansson authored
In cases when the mmc host doesn't support HW busy detection, polling for a card being busy by using CMD13 is beneficial. That is because, instead of waiting a fixed amount of time, 500ms or the generic CMD6 time from EXT_CSD, we find out a lot sooner when the card stops signaling busy. This leads to a significant decreased total initialization time for the mmc card. However, to allow polling with CMD13 during a bus timing change operation, such as switching to HS mode, we first need to update the mmc host's bus timing before starting to poll. Deal with that, simply by providing MMC_TIMING_MMC_HS as the timing parameter to __mmc_switch() from mmc_select_hs(). By telling __mmc_switch() to allow polling with CMD13, also makes it validate the CMD6 status, thus we can remove the corresponding checks. When switching to HS400ES, the mmc_select_hs() function is called in one of the intermediate steps. To still prevent CMD13 polling for HS400ES, let's call the __mmc_switch() function in this path as it enables us to keep using the existing method. Signed-off-by:
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Ulf Hansson authored
In cases when a speed mode change is requested for mmc cards, a CMD6 is sent by calling __mmc_switch() during the card initialization. The CMD6 leads to the card entering a busy period. When that is completed, the host must parse the CMD6 status to find out whether the change of the speed mode succeeded. To enable the mmc core to poll the card by using CMD13 to find out when the busy period is completed, it's reasonable to make sure polling is done by having the mmc host and the mmc card, being configured to operate at the same selected bus speed timing. Therefore, let's extend __mmc_switch() to take yet another parameter, which allow its callers to update the bus speed timing of the mmc host. In this way, __mmc_switch() also becomes capable of reading and validating the CMD6 status by sending a CMD13, in cases when that's desired. If __mmc_switch() encounters a failure, we make sure to restores the old bus speed timing for the mmc host, before propagating the error code. Signed-off-by:
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Ulf Hansson authored
According to the JEDEC specification, the SWITCH_ERROR bit in the device status from a R1 response, is an error bit which may be cleared as soon as the response that reports the error is sent. When polling with CMD13 to find out when the card stops signaling busy after a CMD6 has been sent, we currently parse only the last CMD13 response for the SWITCH_ERROR bit. Consequentially we could loose important information about the card. In worst case if the card stops signaling busy within the allowed timeout, we could end up believing that the CMD6 command completed successfully, when in fact it didn't. To improve the behaviour, let's parse each CMD13 response to see if the SWITCH_ERROR bit is set in the device status. In such case, we abort the polling loop and report the error. Signed-off-by:
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Ulf Hansson authored
The ignore_crc parameter/variable name is used at a couple of places in the mmc core. Let's rename it to retry_crc_err to reflect its new purpose. Signed-off-by:
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Ulf Hansson authored
There are only one users left which calls __mmc_send_status(). Moreover, the ignore_crc parameter isn't being used, so let's just remove these redundant parts. Signed-off-by:
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Ulf Hansson authored
After a CMD6 command has been sent, the __mmc_switch() function might be advised to poll the card for busy by using CMD13 and also by ignoring CRC errors. In the case of ignoring CRC errors, the mmc core tells the mmc host to also ignore these errors via masking the MMC_RSP_CRC response flag. This seems wrong, as it leads to that the mmc host could propagate an unreliable response, instead of a proper error code. What we really want, is not to ignore CRC errors but instead retry the polling attempt. So, let's change this by treating a CRC error as the card is still being busy and thus continue to run the polling loop. Signed-off-by:
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David E. Box authored
With commit f35bbf61 ("gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found"), a gpio descriptor request can now be deferred if the providing gpio host controller driver hasn't been loaded yet. Allow use in mmc slot probe in order to prevent card detect gpio setup from failing in this case. Signed-off-by:
David E. Box <david.e.box@linux.intel.com> Signed-off-by:
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Adrian Hunter authored
Add support for eMMC/SD/SDIO Intel GLK host controllers. Signed-off-by:
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Ritesh Harjani authored
The newer msm sdhci's cores use a different DLL hardware for HS400. Update the configuration and calibration of the newer DLL block. The HS400 DLL block used previously is CDC LP 533 and requires programming multiple registers and waiting for configuration to complete and then enable it. It has about 18 register writes and two register reads. The newer HS400 DLL block is SDC4 DLL and requires two register writes for configuration and one register read to confirm that it is initialized. There is an additional register write to enable the power save mode for SDC4 DLL block. Signed-off-by:
Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by:
Krishna Konda <kkonda@codeaurora.org> Acked-by:
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Ritesh Harjani authored
In HS400 mode a new RCLK is introduced on the interface for read data transfers. The eMMC5.0 device transmits the read data to the host with respect to rising and falling edges of RCLK. In order to ensure correct operation of read data transfers in HS400 mode, the incoming RX data needs to be sampled by delayed version of RCLK. The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be initialized, configured and enabled once during HS400 mode switch and when operational voltage/clock is changed. Signed-off-by:
Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by:
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Ritesh Harjani authored
Save the tuning phase once the tuning is performed. This phase value will be used while calibrating DLL for HS400 mode. Signed-off-by:
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Venkat Gopalakrishnan authored
The following msm platform specific changes are added to support HS400. - Allow tuning for HS400 mode. - Configure HS400 timing mode using the VENDOR_SPECIFIC_FUNC register. Signed-off-by:
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Ritesh Harjani authored
SDHC MSM controller need 2x clock for MCLK at GCC. Hence make required changes to have 2x clock for DDR timing modes. Signed-off-by:
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Ritesh Harjani authored
sdhci-msm controller may have different clk-rates for each bus speed mode. Thus implement set_clock callback for sdhci-msm driver. Signed-off-by:
Sahitya Tummala <stummala@codeaurora.org> Signed-off-by:
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Ritesh Harjani authored
Factor out sdhci_enable_clk from sdhci_set_clock and make it EXPORT_SYMBOL so that it can be called. Signed-off-by:
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Ritesh Harjani authored
sdhc-msm controller needs this SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN & SDHCI_QUIRK2_PRESET_VALUE_BROKEN to be set. Hence setting it. Signed-off-by:
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Ritesh Harjani authored
This add get_min_clock() and get_max_clock() callback for sdhci-msm. sdhci-msm min/max clocks may be different hence implement these callbacks. Signed-off-by:
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Venkat Gopalakrishnan authored
SDCC core with minor version >= 0x42 introduced new 14lpp DLL. This has additional requirements in the reset sequence for DLL tuning. Make necessary changes as needed. Without this patch we see below errors on such SDHC controllers sdhci_msm 7464900.sdhci: mmc0: DLL failed to LOCK mmc0: tuning execution failed: -110 Signed-off-by:
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Ritesh Harjani authored
Add "xo" value which is tcxo clock to sdhci-msm DT binding properties. Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Acked-by:
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Ritesh Harjani authored
This patch changes the poor style of writel/readl registers into more readable format. This avoid mixed style format of readl/writel in sdhci-msm driver. This patch also removes the one line comments which were present for above writel/readl, since they were of no help. Signed-off-by:
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Jaehoon Chung authored
"support-highspeed" was the obsoleted property. And "broken-cd" is not synopsys specific property. It can be referred to mmc.txt binding Documentation. Signed-off-by:
Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by:
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Jaehoon Chung authored
The "clock-freq-min-max" property was deprecated. There is "max-frequency" property in drivers/mmc/core/host.c "max-frequency" can be replaced with "clock-freq-min-max". Minimum clock value might be set to 100K by default. Then MMC core should try to find the correct value from 400K to 100K. So it just needs to set Maximum clock value. Signed-off-by:
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Jaehoon Chung authored
Remove the unnecessary mmc_data structure. Instead, cmd->data can be used. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
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Jaehoon Chung authored
This patch removed the meaningless value. Instead, use the cookie's enum values for executing correctly. Signed-off-by:
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Jaehoon Chung authored
stop_cmdr should be set to values relevant to stop command. It migth be assigned to values whatever there is mrq->stop or not. Then it doesn't need to use dw_mci_prepare_command(). It's enough to use the prep_stop_abort for preparing stop command. Signed-off-by:
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Jaehoon Chung authored
If DW_MMC_CARD_NO_USE_HOLD isn't set, it's usesd by default. Enve if SDMMC_CMD_USB_HOLD_REG is set in prepare_command(), but it doesn't set in pre_stop_abort(). To maintain the consistency, add the checking condition for this. Signed-off-by:
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Jaehoon Chung authored
If there is no property "clock-freq-min-max", mmc->f_min should be set to 400K by default. But Some SoC can be used 100K. When 100K is used, MMC core will try to check from 400K to 100K. Reported-by:
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Jaehoon Chung authored
If display the debug message, this message should be spamming. If flags is maintained the previous value, didn't display the debug message. Signed-off-by:
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Jaehoon Chung authored
Developer wants to see the real register value, not register offset. This patch fixed to display the real value of register. Signed-off-by:
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Colin Ian King authored
Trivial fix to spelling mistake "desciptor" to "descriptor" in dev_dbg message. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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