- 18 Jul, 2014 40 commits
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Anssi Hannula authored
The rxtx2 clock of i.MX6 S/PDIF is currently set to "asrc" clock. However, according to SoC documentation, rxtx2 is connected to ASRC_EXT_CLK, a different external clock. Testing on Cubox-i system seems to confirm that: when fsl_spdif is forced to select rxtx2 as input clock, audio playback fails with an I/O error. Set rxtx2 to the dummy clock by default to prevent fsl_spdif from selecting it. Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi> Cc: Mark Brown <broonie@kernel.org> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lothar Waßmann authored
This patch adds support for the Ka-Ro electronics GmbH TX6 modules. There are five distinct module types with either i.MX6Q or i.MX6DL and LVDS or LCD display interface and one DTS file for a complete system with an i.MX6DL based TX6 module and a baseboard mounted on the back of a display (imx6dl-tx6dl-comtft.dts). Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch adds the missing (General Purpose Timer) GPT devicetree node for i.MX35 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lothar Waßmann authored
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Denis Carikli authored
The CMO-QVGA, DVI-VGA and DVI-SVGA displays were added. Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Philipp Zabel authored
This patch adds CSI subnodes for IPU1 and IPU2 that will contain ports and endpoints connecting to external elements in the video pipeline. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Philipp Zabel authored
The 2.5V VDD_ETH_IO voltage supplied by the DA9063 LDO4 is used to power the KSZ9031 PHY DVDDH input and to pull the necessary pins (including bootstrap pins) high. It also powers the i.MX6 NVCC_RGMII and NVCC_ENET inputs. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Tim Harvey authored
The imx6dl dts supports both DualLite and Solo CPU variants The imx6q dts supports both Dual and Quad CPU variants Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Tim Harvey authored
The 'model' property in the imx-audio-sgtl5000 binding specifies the user-visible name of the audio device. This should be something common and not baseboard specific. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexandre Belloni authored
The PWM3 pinmux configuration conflicts with gpio 3.28. Introduce a regulator for mmc0 so that it conflicts with the pwm driver and fails gracefully. The kernel will then able to access mmc0 normally. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fugang Duan authored
when system suspend, need to set pins to low power state to save IO power consumption, there are three states of pinctrl: "default", "idle" and "sleep". Currently enet supports default and sleep state. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
GPIO4_9 is used as ECSPI1 chip select and it needs to be configured as GPIO. Configure the pin functionality explicitly in the dts file instead of relying on the fact that it comes configured as GPIO from POR or from the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch adds support for the cpuimx27 board from Eukrea and its baseboard. This change is intended to further remove non-DT support for this board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Shawn Guo authored
Add initial imx6sx-sdb board support with limited devices enabled. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Shawn Guo authored
Add initial device tree source for i.MX6 SoloX SoC. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Shawn Guo authored
Add pin function header for i.MX6 SoloX SoC. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Shawn Guo authored
The i.MX SoC changes for 3.17: - Add devicetree support for i.MX1 and i.MX21 clock driver - Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets - Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in device tree boot - Remove i.MX1 camera support - Remove i.MX27 IP Camera and Lite-Kit board support - Add suspend and cpuidle support for i.mx6sx - Clean up unused clk_register_clkdev() lookups - Update imx-weim bus driver to support populating devices on a simple bus - Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs - Make i.MX51 a DT only platform and clean up the non-DT support code - Support disabling supervisor protect via DT - Random defconfig updates
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Stefan Agner authored
Extend the clock control for FlexCAN with the second gate which enable the clocks in the Clock Divider (CCM_CSCDR2) register too. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch uses clocksource_of_init() call for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Steffen Trumtrar authored
Most peripherals on the i.MX53 have an Off-Platform Peripheral Access Control Register (OPACR) in which the access rights (together with the MPROT registers) can be declared. However, this does not seem to work for example for SSI1+SDMA, because the supervisor bit is not set for the SDMA unit. It does work for SSI2, the QSB for example uses SSI2 for its audio. But SSI2 only works because it does NOT have an OPACR. The right solution would be to fix the access rights for the SDMA, but the unit responsible for this is the Central Security Unit (CSU), which of course is NOT documented. So, until documentation for this is openly available, turn off the supervisor protection because it cripples the hardware. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Steffen Trumtrar authored
The i.MX SoCs allow to setup fine grained access rights to peripherals on the AIPS bus. This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21 or in later SoC versions the Off-Platform Peripheral Access Control Register (OPACR), e.g. i.MX53. Under certain circumstances this leads to problems in which bus masters are not granted their access rights to peripherals. To be able to disable these restrictions on DT platforms, add a helper function that looks for AIPS nodes in the DT and disables them for every compatible node it finds. The compatible has to be declared in the mach-specific entry file, where this helper function should then be called. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch adds missing 26 MHz oscillator circuit clock gate support. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch removes definitions which not used anywhere in the driver. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
Use clock defines in order to make devicetrees more human readable. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
The board has no insufficient support to be fully functional and seems has no users. This patch removes support for this board. However, the support may be added in the future by using the devicetree. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch removes excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27. Instead we use SOC_IMX*. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
i.MX1 camera driver has been removed by the commit 90b05589. This patch removes remaining support files for this camera. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabian Frederick authored
replace IS_ERR/PTR_ERR Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Liu Ying authored
There could be some memory map devices located in a certain chip select region of the i.MX WEIM. The devices could be attached to a simple bus(for example, a AXI bus) whose root node is one child device tree node of the i.MX WEIM device tree node. There should be a bridge(very likely, software transparent) bewteen the i.MX WEIM and the simple bus. This patch makes the i.MX WEIM driver possible to populate devices on a simple bus. In this way, people may try various IPs(in a FPGA, maybe) outside of i.MX chips with the i.MX WEIM embedded. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Arnd Bergmann authored
imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl based machine. However if support for imx6sl is not enabled at compile time, this prevents us from building the kernel and we get this link error instead: arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': :(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk' This makes the cpu_is_imx6sl function conditionally return false if imx6sl is disabled at compile-time, which matches what the older cpu_is_mx* macros did. We have similar inline functions for the other imx6 variants, but so far I have not run into a case where the extra #ifdef is necessary. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Arnd Bergmann authored
Building a kernel for imx6sx but without imx6q support results in this link error because of the missing cpuidle driver: arch/arm/mach-imx/built-in.o: In function `imx6sx_init_late'::(.init.text+0xc228): undefined reference to `imx6q_cpuidle_init' This patch adds a Makefile entry so we always build support for the imx6q_cpuidle code when at least one of the 6sx or 6q variants are enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Shawn Guo authored
The PL310 integrated on i.MX6 series and VF610 are revision r3p1 and later. Per ARM PL310 errata document, 588369 is fixed in r2p0 and 727915 is fixed in r3p1. Neither is needed for i.MX6 or VF610. So let's drop them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Stefan Agner authored
Add EDMA for DMA support for Vybrid SoCs. Also add printk time. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
SSI and SSI_IPG are clocks controlled by the same clock gating field, so register them with imx_clk_gate2_shared. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Silvio Fricke authored
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Silvio Fricke authored
Enable STMPE gpio support as this is used on MX6 Data Modul edm-qmx6 board. Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Shawn Guo authored
Otherwise GCC will mark the .init.rodata section R/W, which causes a compile error once we add other real R/O data. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
It is only the mx6quad variant that can run up to 1.2GHz, so add the check accordingly. This avoids getting the following warning on a mx6solo: failed to disable 1.2 GHz OPP Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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