- 09 Apr, 2019 3 commits
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Clément Péron authored
Beelink GS1 device-tree has been introduced. Add it to the sunxi yaml documentation. Signed-off-by:
Clément Péron <peron.clem@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com>
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Ondrej Jirman authored
TBS A711 tablet has volume up/down keys connected to r_lradc. Add support for these keys. Signed-off-by:
Ondrej Jirman <megous@megous.com> Signed-off-by:
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Ziping Chen authored
Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC. Now the driver has been modified to support it. Add support for it. Signed-off-by:
Ziping Chen <techping.chan@gmail.com> Signed-off-by:
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- 08 Apr, 2019 1 commit
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Miquel Raynal authored
In the current state, A33 NAND controllers use PIO during transfers. Throughput can be increased thanks to the use of DMA (mostly during reads, because of the ECC pipelining feature). Besides the usual addition of DMA DT properties, because the A33 NAND DMA handling is different than for older SoCs, we must also update the compatible which has recently been introduced for this purpose. Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by:
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- 05 Apr, 2019 1 commit
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Ondrej Jirman authored
TBS A711 tablet contains u-blox NEO-6M module connected to UART2. Enable UART2 to gain access to the module from userspace. Signed-off-by:
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- 04 Apr, 2019 2 commits
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Maxime Ripard authored
We have for the H3 boards some kind of cargo cult apparently, where we would have a pinctrl node even for GPIOs without any particular settings. This is pretty much useless, so let's remove them. Acked-by:
Chen-Yu Tsai <wens@csie.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Maxime Ripard authored
So far we've enabled pull-up and pull-down resistors on GPIOs using a pinctrl node. Now that the GPIO binding allows for a flag to declare this, let's switch to it. This brings us closer to removing all the GPIO pinctrl nodes, which will in turn allow us to switch the pinctrl strict mode on. Acked-by:
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- 02 Apr, 2019 2 commits
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Maxime Ripard authored
The NAND chips in our DTs have address and size cells, even though they don't have any child nodes. Remove them. Reviewed-by:
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Maxime Ripard authored
The NAND controller node name should be nand-controller and not nand as we used previously according to the devicetree specification. Let's fix our DTs. Reviewed-by:
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- 01 Apr, 2019 6 commits
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Ondrej Jirman authored
A83T DTSI has cpu clocks defined only on the first CPU in each cluster. We can bring down any CPU in the cluster, so we need to define clock for each CPU, so that the system knows what clock to use if the first CPU is down. Also move the clocks property below the compatible on cpus where it is already defined. Property "clock-names" is not needed. Signed-off-by:
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Ondrej Jirman authored
Add pin definitions for UART2 PB pins. These are used on TBS-A711 tablet. Signed-off-by:
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Ondrej Jirman authored
A711 tablet has BMA250 accelerometer connected to I2C1 bus. Enable both the I2C1 bus and add the accelerometer device to it. Signed-off-by:
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Ondrej Jirman authored
Enable to use CPUs as cooling device in the future, by adding "#cooling-cells" to each CPU node. This property should be present for all the CPUs of a cluster. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Signed-off-by:
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Ondrej Jirman authored
A83T has 5 UART interfaces, but only the first two have their nodes defined in sun8i-a83t.dtsi. Add nodes for the missing interfaces. Signed-off-by:
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Ondrej Jirman authored
TBS A711 tablet has a bcm20702a1 bluetooth chip (part of AP6210 WiFi/BT module) connected to UART1. Add node for the blutooth chip. The driver needs brcm/BCM20702A1.hcd firmware file to run. Signed-off-by:
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- 26 Mar, 2019 2 commits
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Mans Rullgard authored
The recently added uart mux options had a few typos. Fix them. Fixes: 43d0fe112585 ("ARM: dts: sun7i: add pinctrl for missing uart mux options") Reported-by:Werner Böllmann <Werner.Boellmann@fh-dortmund.de> Signed-off-by:
Mans Rullgard <mans@mansr.com> Signed-off-by:
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Maxime Ripard authored
We switched to the generic pinctrl binding some time ago, yet the GMAC pinctrl node apparently slipped through. Fix this. Acked-by:
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- 25 Mar, 2019 23 commits
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Maxime Ripard authored
The USB OTG binding we have mandates to have a dr_mode property, yet not all boards are setting it. Since the generic otg binding states that the default mode should be the OTG mode, let's use that one in our DTSI. Acked-by:
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Maxime Ripard authored
The NAND pinctrl nodes names don't follow the pattern we've used and enforced for some time. Make sure they do. Acked-by:
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Maxime Ripard authored
The children nodes of the pinctrl node hadn't have any reg property for quite some time, so we don't need the size-cells property. Remove it. Acked-by:
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Maxime Ripard authored
The SATA controller never have any children nodes, so we don't need the address and size cells properties. Acked-by:
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Maxime Ripard authored
The AHCI node was introduced with a typo in the reset-names property that got written resets-name instead. This was working because the reset is optional for that driver, and the controller was put out of reset by the bootloader. Fixes: 41c64d33 ("ARM: dts: sun8i: r40: add sata node") Acked-by:
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Maxime Ripard authored
Even though it doesn't make any difference at the binary level, the reg property is an array of cells, and should be represented as such. Acked-by:
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Maxime Ripard authored
The regulator properties suffix is -supply, yet a _supply slipped in. This was working because the regulator framework will provide a dummy regulator when none is provided in the device tree, and the regulator itself was always enabled. Fixes: 90c5d7cd ("ARM: dts: sun8i: a711: Add regulator support") Acked-by:
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Maxime Ripard authored
Even though we shouldn't really have any external user of the clock provided by the TCON, if clock-output-names is set, then #clock-cells must be there as well. Fix this. Acked-by:
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Maxime Ripard authored
While the USB PHY Device Tree mandates that the name of the VBUS detect pin should be usb0_vbus_det-gpios, a significant number of device tree use usb0_vbus_det-gpio instead. This was functional because the GPIO framework falls back to the gpio suffix that is legacy, but we should fix this. Acked-by:
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Maxime Ripard authored
While the USB PHY Device Tree mandates that the name of the ID detect pin should be usb0_id_det-gpios, a significant number of device tree use usb0_id_det-gpio instead. This was functional because the GPIO framework falls back to the gpio suffix that is legacy, but we should fix this. Acked-by:
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Maxime Ripard authored
The i2c-gpio driver uses named gpios now and the array of GPIOs is deprecated. Switch to the new binding. Acked-by:
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Maxime Ripard authored
As can be shown by the YAML schema now, the combination of GIC compatibles we were using has never been an option. Switch to the gic-400 variant, which is the more correct option. Acked-by:
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Maxime Ripard authored
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl group anymore. Drop them. Acked-by:
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Maxime Ripard authored
Commit 1848f3f4 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings") was wrong on the optimus, and instead of droping the pinctrl-names property, it dropped the regulator-name one. Obviously, that wasn't what was intended. Reinstate regulator-name and drop pinctrl-names. Fixes: 1848f3f4 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings") Acked-by:
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Maxime Ripard authored
Commit 1f8afea8fee0 ("dt-bindings: Add YAML description for Allwinner boards") added an exhaustive list of the valid compatibles used for both the SoCs and boards. We can therefore remove the old documentation, that never got as well updated as it should have. Acked-by: -
Maxime Ripard authored
The A23 and A33 both have an I2C controller in the ARISC domain, that share the same pins with the RSB bus. Even if it's an unusual configuration, that device can be used to drive the PMIC, so let's use it. Acked-by:
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Maxime Ripard authored
The DSI bindings require that an address cell size of 1, and a size cell of 0. Instead of duplicating it in each and every board DTS file, let's put it in the DTSI. Acked-by:
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Maxime Ripard authored
We've never had a board compatibles documentation for the Allwinner boards so far. Let's create a json-schema for them. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Maxime Ripard authored
The soc node in the A80 DTSI has a ranges property, but no matching unit address, which results in a DTC warning. Add the unit address to remove that warning. Signed-off-by: -
Maxime Ripard authored
Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by:
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Maxime Ripard authored
Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by:
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Maxime Ripard authored
Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by:
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Maxime Ripard authored
Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by:
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