- 29 Mar, 2017 40 commits
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Christopher N Bednarz authored
Fix a case where we miss an arq element if a new one is added before we enable interrupts and exit the arq subtask loop. This occurs frequently with RDMA running on Windows VF and causes long delays that prevent SMB from establishing connections. Change-ID: I3e1c8b2b960c12857d9b8275bea2c1563674392e Signed-off-by:
Christopher N Bednarz <christopher.n.bednarz@intel.com> Tested-by:
Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Paul M Stillwell Jr authored
The XL722 doesn't support the AQ command to read/write the control register so enable it to bypass the check and use the direct read/write method. Change-ID: Iefecc737b57207485c90845af5989d5af518bf16 Signed-off-by:
Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Tested-by:
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Alexander Duyck authored
This patch cleans up and addresses several issues in the way that i40e handles private flags. Previously the code was choosing fixed bits and trying to match them up with strings in a somewhat haphazard way. This resulted in the possibility for adding a new bit and causing a mismatch as the private flags are linear bits starting at 0, and the private flags in the driver were split up over a group specific to the PF and a group that was global. What this change does is define an array of structs used to represent the private flags. Contained within the structs are the bits necessary to know which flags to set and/or clear depending on the state of the bit. By doing this we can add new bits in the future with minimal overhead and avoid creating possible mis-matches should we need to remove a flag based on compile options. Change-ID: Ia3214ab04f0ab2f70354ac0997a135f1d01b0acd Signed-off-by:
Alexander Duyck <alexander.h.duyck@intel.com> Tested-by:
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Preethi Banala authored
The current driver mode is to use a write-back mechanism for the head register which indicates transmit completions. The VF driver needs to be able to work on hardware that exclusively uses descriptor write-back, so change the default driver mode of operation to descriptor write-back for VF. In our analysis, performance wasn't significantly different with either write-back method. Change-ID: Ia92e4ec77c2df8dc4515c71d53746d57d77759af Signed-off-by:
Preethi Banala <preethi.banala@intel.com> Signed-off-by:
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David S. Miller authored
David Ahern says: ==================== netconf: Add support for RTM_DELNETCONF netconf notifications are sent as devices register but not when they are deleted leaving userspace caches out of sync. Add support for RTM_DELNETCONF to ipv4, ipv6 and mpls. MPLS is missing RTM_NEWNETCONF as devices are created, so add it as well. ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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David Ahern authored
Send netconf notifications for MPLS when the device registers and unregisters. Signed-off-by:
David Ahern <dsa@cumulusnetworks.com> Signed-off-by:
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David Ahern authored
Refactor mpls_netconf_notify_devconf to take the event as an input arg. Signed-off-by:
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David Ahern authored
Send RTM_DELNETCONF notifications when a device is deleted. The message only needs the device index, so modify inet6_netconf_fill_devconf to skip devconf references if it is NULL. Allows a userspace cache to remove entries as devices are deleted. Signed-off-by:
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David Ahern authored
Refactor inet6_netconf_notify_devconf to take the event as an input arg. Signed-off-by:
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David Ahern authored
Send RTM_DELNETCONF notifications when a device is deleted. The message only needs the device index, so modify inet_netconf_fill_devconf to skip devconf references if it is NULL. Allows a userspace cache to remove entries as devices are deleted. Signed-off-by:
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David Ahern authored
Refactor inet_netconf_notify_devconf to take the event as an input arg. Signed-off-by:
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David Ahern authored
Signed-off-by:
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Prasad Kanneganti authored
Refactor interrupt moderation code for flexibility because parameters are different for 10G and 25G cards. Currently parameters (for 10G only) come from macros compiled-in to the PF and VF drivers; fix it so that parameters suitable for the card (10G or 25G) come from the NIC firmware via response to a command. Also bump up driver version to 1.5.1 to match newer NIC firmware version. Signed-off-by:
Prasad Kanneganti <prasad.kanneganti@cavium.com> Signed-off-by:
Felix Manlunas <felix.manlunas@cavium.com> Signed-off-by:
Derek Chickles <derek.chickles@cavium.com> Signed-off-by:
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Vivien Didelot authored
I do not hold the copyright of the DSA core and drivers source files, since these changes have been written as an initiative of my day job. Fix this. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Vivien Didelot authored
Set the trunk member of the mv88e6xxx_atu_entry structure regardless its value, so that uninitialized structures gets the correct boolean value. Note that no mainline code is affected by the current behavior. Signed-off-by:
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Vlad Yasevich authored
This patch adds support for NETDEV_RESEND_IGMP event similar to how it works for IPv4. Signed-off-by:
Vladislav Yasevich <vyasevic@redhat.com> Signed-off-by:
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David S. Miller authored
Vivien Didelot says: ==================== net: dsa: fix chip definitions The definitions of some of the mv88e6xxx_ops and mv88e6xxx_info structures are misordered and erroneous for 88E6191 and 88E6391. This patch series cleans that up. ==================== Signed-off-by: -
Vivien Didelot authored
We don't support 88E6391 anywhere in the code, so remove the unused mv88e6391_ops structure. Signed-off-by:
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Vivien Didelot authored
The mv88e6xxx_info structure for the 88E6191 chip was pointing the mv88e6391_ops definition instead of mv88e6191_ops. Fix this. Signed-off-by:
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Vivien Didelot authored
The related mv88e6xxx_ops structure was misplaced. Reorder it correctly to fix this. Signed-off-by:
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Vivien Didelot authored
The related mv88e6xxx_ops and mv88e6xxx_info structure were misplaced. Reorder them correctly to fix this. Signed-off-by:
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David S. Miller authored
Yuval Mintz says: ==================== qed: load/unload mfw series This series correct the unload flow and greatly enhances its initialization flow in regard to interactions between driver and management firmware. Patch #1 makes sure unloading is done under management-firmware's 'criticial section' protection. Patches #2 - #4 move driver into using a newer scheme for loading in regard to the MFW; This newer scheme would help cleaning the device in case a previous instance has dirtied it [preboot, PDA, etc.]. Patches #5 - #6 let driver inform management-firmware on number of resources which are dependent on the non-management firmware used. Patch #7 then uses a new resource [BDQ] instead of some set value. ==================== Signed-off-by: -
Mintz, Yuval authored
Until now, qed used some port-defined value as BDQ index for both iSCSI and FCoE. As management firmware now treats BDQ as a resource and tells each PF its BDQ-range, start using a valure from that range instead. Signed-off-by:
Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by:
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Tomer Tayar authored
Management firmware is used as an arbiter between the various PFs in matters of resources, but some of the resources that need to be divided are dependent on the non-management firmware used, so management firmware first needs to be told how many resources there are before trying to divide them. As part of the initialization sequence, driver would first inform the management firmware of the available resources under a dedicated resource lock, and afterwards request for various resources which might be based on the previous set values. Signed-off-by:
Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by:
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Tomer Tayar authored
Global locking can't properly be used to synchronize between different PFs in all scenarios, as those instances might reside in different logical partitions [e.g., when a PF is assigned via PDA to some VM]. The management firmware provides a generic infrastructure for device locks. For each 'resource', it's guaranteed it could be acquired by at most a single PF at any given time [or by management firmware]. This patch adds the necessary logic in qed for utilizing said infrastructure, implementing lock/unlock internal APIs. Signed-off-by:
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Mintz, Yuval authored
During HW initialization, driver would set various registers to their needed values - but it assumes all registers start at their reset-value, so there's no need to re-configure a register's default value. This assumption might be incorrect, e.g., in case of preboot driver running and initializing the driver prior to our driver. To overcome this, we now ask management firmware to initiate a PF-flr early during the initialization sequence. That would return everything in the PF's scope back to default and prevent previous configurations from still being applied. Signed-off-by:
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Tomer Tayar authored
Management firmware is used as an arbiter between the various PFs in regard to loading - it causes the various PFs to load/unload sequentially and informs each of its appropriate rule in the init. But the existing flow is too weak to handle some scenarios where PFs aren't properly cleaned prior to loading. The significant scenarios falling under this criteria: a. Preboot drivers in some environment can't properly unload. b. Unexpected driver replacement [kdump, PDA]. Modern management firmware supports a more intricate loading flow, where the driver has the ability to overcome previous limitations. This moves qed into using this newer scheme. Notice new scheme is backward compatible, so new drivers would still be able to load properly on top of older management firmwares and vice versa. Signed-off-by:
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Mintz, Yuval authored
We'll soon need additional information, so start by changing the infrastructure to receive the initializing variables via a parameter struct. Signed-off-by:
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Tomer Tayar authored
Management firmware is used as arbiter between different PFs which are loading/unloading, but in order to use the synchronization it offers the contending configurations need to be applied either between their LOAD_REQ <-> LOAD_DONE or UNLOAD_REQ <-> UNLOAD_DONE management firmware commands. Existing HW stop flow utilizes 2 different functions: qed_hw_stop() and qed_hw_reset() which don't abide this requirement; Most of the closure is doing outside the scope of the unload request. This patch removes qed_hw_reset() and places the relevant stop functionality underneath the management firmware protection. Signed-off-by:
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David S. Miller authored
Parthasarathy Bhuvaragan says: ==================== tipc: subscription refcount simplifications The first patch makes the subscription refcount cleanup lockless and the second updates the subscription refcount policy. ==================== Signed-off-by: -
Ying Xue authored
When a new subscription object is inserted into name_seq->subscriptions list, it's under name_seq->lock protection; when a subscription is deleted from the list, it's also under the same lock protection; similarly, when accessing a subscription by going through subscriptions list, the entire process is also protected by the name_seq->lock. Therefore, if subscription refcount is increased before it's inserted into subscriptions list, and its refcount is decreased after it's deleted from the list, it will be unnecessary to hold refcount at all before accessing subscription object which is obtained by going through subscriptions list under name_seq->lock protection. Signed-off-by:
Ying Xue <ying.xue@windriver.com> Reviewed-by:
Jon Maloy <jon.maloy@ericsson.com> Signed-off-by:
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Ying Xue authored
After a subscription object is created, it's inserted into its subscriber subscrp_list list under subscriber lock protection, similarly, before it's destroyed, it should be first removed from its subscriber->subscrp_list. Since the subscription list is accessed with subscriber lock, all the subscriptions are valid during the lock duration. Hence in tipc_subscrb_subscrp_delete(), we remove subscription get/put and the extra subscriber unlock/lock. After this change, the subscriptions refcount cleanup is very simple and does not access any lock. Acked-by:
Parthasarathy Bhuvaragan <parthasarathy.bhuvaragan@ericsson.com> Signed-off-by:
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Arnd Bergmann authored
A driver must not access the two fields directly but should instead use the helper functions to set the values and keep a consistent internal state: ethernet/stmicro/stmmac/stmmac_main.c: In function 'stmmac_dvr_probe': ethernet/stmicro/stmmac/stmmac_main.c:4083:8: error: 'struct net_device' has no member named 'real_num_rx_queues'; did you mean 'real_num_tx_queues'? Fixes: a8f5102a ("net: stmmac: TX and RX queue priority configuration") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Bjorn Andersson authored
With the RPM driver transitioned to RPMSG we can reuse the SMD-RPM driver ontop of GLINK for 8996, without any modifications. Acked-by:
Andy Gross <andy.gross@linaro.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
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Bjorn Andersson authored
Remove the standalone SMD implementation as we have transitioned the client drivers to use the RPMSG based one. Also remove all dependencies on QCOM_SMD from Kconfig files, in order to keep them selectable in the absence of the removed symbol. Acked-by:
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Bjorn Andersson authored
By moving these client drivers to use RPMSG instead of the direct SMD API we can reuse them ontop of the newly added GLINK wire-protocol support found in the 820 and 835 Qualcomm platforms. As the new (RPMSG-based) and old SMD implementations are mutually exclusive we have to change all client drivers in one commit, to make sure we have a working system before and after this transition. Acked-by:
Kalle Valo <kvalo@codeaurora.org> Acked-by:
Marcel Holtmann <marcel@holtmann.org> Signed-off-by:
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Roopa Prabhu authored
vxlan driver already implicitly supports installing of external fdb entries with NTF_EXT_LEARNED. This patch just makes sure these entries are not aged by the vxlan driver. An external entity managing these entries will age them out. This is consistent with the use of NTF_EXT_LEARNED in the bridge driver. Signed-off-by:
Roopa Prabhu <roopa@cumulusnetworks.com> Signed-off-by:
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David S. Miller authored
Jiri Pirko says: ==================== Add support for pipeline debug (dpipe) Arkadi says: While doing the hardware offloading process much of the hardware specifics cannot be presented. An example for such is the routing LPM algorithm which differ in hardware implementation from the kernel software implementation. The only information the user receives is whether specific route is offloaded or not, but he cannot really understand the underlying implementation nor get the specific statistics related to that process. Another example is ACL offload using TC which is commonly implemented using TCAM memory. Currently there is no capability to gain visibility into the TCAM structure and to debug suboptimal resource allocation. This patchset introduces capability for exporting the ASICs pipeline abstraction via devlink infrastructure, which should serve as an complementary tool. This infrastructure allows the user to get visibility into the ASIC by modeling it as a set of match/action tables. The main objects defined: Table - abstraction for a single pipeline stage. Contains the available match/actions and counter availability. Entry - entry in a specific table with specific matches/actions values and dedicated counter. Header/field - tuples which describes the tables behavior. As an example one of the ASIC's L3 blocks will be modeled. The egress rif (router interface) table is the final step in the L3 pipeline processing which does match on the internal rif index which was determined before by the routing logic. The erif table determines whether to forward or drop the packet and updates the corresponding rif L3 statistics. To expose this internal resources a special metadata header will be introduced that describes the internal information gathered by the ASIC's pipeline and contains the following fields: rif_port_index, forward and drop. Some internal hardware resources have direct mapping to kernel objects. For example the rif_port_index is mapped to the net-devices ifindex. By providing this mapping the users gains visibility into the offloading process. Follow-up work will include exporting more L3 tables which will give visibility into the routing process. First stage is adding support for dpipe in devlink. Next add support in spectrum driver. Finally implement egress router interface (erif) table for spectrum ASIC as an example. --- v1->v2: Please see individual patches ==================== Signed-off-by: -
Arkadi Sharshevsky authored
Implement dpipe's table ops for erif table which provide: 1. Getting the entries in the table with the associate values. - match on "mlxsw_meta:erif_index" - action on "mlxsw_meta:forwared_out" 2. Synchronize the hardware in case of enabling/disabling counters which mean removing erif counters from all interfaces. Signed-off-by:
Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
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Arkadi Sharshevsky authored
Add rif helper function to access the rif index and rif devices ifindex. This functions will be used by dpipe in order to dump the rif table. Signed-off-by:
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