- 25 Aug, 2015 15 commits
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Christian König authored
It isn't protecting anything. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Keep run queue, entity and scheduler handling together. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
That actually didn't worked at all. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Cleanup function name, stop checking scheduler ready twice, but check if kernel thread should stop instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
None of them are used any more. v2: fix type in error message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
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Christian König authored
Remove active_hw_rq and it's protecting queue_lock, they are unused. User 32bit atomic for hw_rq_count, 64bits for counting to three is a bit overkill. Cleanup the function name and remove incorrect comments. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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Christian König authored
Simply not used any more. Only keep 32bit atomic for fence sequence numbering. v2: trivial rebase Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
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Chunming Zhou authored
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
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Junwei Zhang authored
Rename the function and update the related code with this modified function. Add the new parameter of bool wait_all. If wait_all is true, it will return when all fences are signaled or timeout. If wait_all is false, it will return when any fence is signaled or timeout. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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Alex Deucher authored
Use pci_alloc_consistent rather than kzalloc since we need 256 byte aligned memory for the ring buffer. v2: fix copy paste typo in free function noticed by Jammy. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91749Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 21 Aug, 2015 2 commits
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Alex Deucher authored
This is a port of: DRM - radeon: Don't link train DisplayPort on HPD until we get the dpcd to amdgpu. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Stephen Chandler Paul authored
Most of the time this isn't an issue since hotplugging an adaptor will trigger a crtc mode change which in turn, causes the driver to probe every DisplayPort for a dpcd. However, in cases where hotplugging doesn't cause a mode change (specifically when one unplugs a monitor from a DisplayPort connector, then plugs that same monitor back in seconds later on the same port without any other monitors connected), we never probe for the dpcd before starting the initial link training. What happens from there looks like this: - GPU has only one monitor connected. It's connected via DisplayPort, and does not go through an adaptor of any sort. - User unplugs DisplayPort connector from GPU. - Change in HPD is detected by the driver, we probe every DisplayPort for a possible connection. - Probe the port the user originally had the monitor connected on for it's dpcd. This fails, and we clear the first (and only the first) byte of the dpcd to indicate we no longer have a dpcd for this port. - User plugs the previously disconnected monitor back into the same DisplayPort. - radeon_connector_hotplug() is called before everyone else, and tries to handle the link training. Since only the first byte of the dpcd is zeroed, the driver is able to complete link training but does so against the wrong dpcd, causing it to initialize the link with the wrong settings. - Display stays blank (usually), dpcd is probed after the initial link training, and the driver prints no obvious messages to the log. In theory, since only one byte of the dpcd is chopped off (specifically, the byte that contains the revision information for DisplayPort), it's not entirely impossible that this bug may not show on certain monitors. For instance, the only reason this bug was visible on my ASUS PB238 monitor was due to the fact that this monitor using the enhanced framing symbol sequence, the flag for which is ignored if the radeon driver thinks that the DisplayPort version is below 1.1. Signed-off-by: Stephen Chandler Paul <cpaul@redhat.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 20 Aug, 2015 14 commits
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Christian König authored
Stop double freeing the the BO list by pulling the content of amdgpu_cs_parser_prepare_job() into the IOCTL function again. v2: better commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
The problem now is that we don't necessarily call amdgpu_ib_get() in some error paths and so work with uninitialized data. Better require that the memory is already zeroed. v2: better commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Fixes a whole bunch of lockdep warnings. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Christian König authored
More appropriate and fixes some nasty lockdep warnings. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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Chunming Zhou authored
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
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Chunming Zhou authored
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
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Chunming Zhou authored
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
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Chunming Zhou authored
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
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Marek Olšák authored
Used by mesa, etc. for profiling. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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https://github.com/Jianwei-Wang/linux-drm-fsl-dcuDave Airlie authored
Merge Freescale DCU FRM driver. * 'drm-next-fsl-dcu' of https://github.com/Jianwei-Wang/linux-drm-fsl-dcu: MAINTAINERS: Add Freescale DCU DRM driver maintainer devicetree: Add NEC to the vendor-prefix list drm/layerscape: Add Freescale DCU DRM driver
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Jianwei Wang authored
Add Alison and myself as maintainers of the Freescale DCU DRM driver. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
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Jianwei Wang authored
NEC represent NEC LCD Technologies, Ltd. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
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Jianwei Wang authored
This patch add support for Two Dimensional Animation and Compositing Engine (2D-ACE) on the Freescale SoCs. 2D-ACE is a Freescale display controller. 2D-ACE describes the functionality of the module extremely well its name is a value that cannot be used as a token in programming languages. Instead the valid token "DCU" is used to tag the register names and function names. The Display Controller Unit (DCU) module is a system master that fetches graphics stored in internal or external memory and displays them on a TFT LCD panel. A wide range of panel sizes is supported and the timing of the interface signals is highly configurable. Graphics are read directly from memory and then blended in real-time, which allows for dynamic content creation with minimal CPU intervention. The features: (1) Full RGB888 output to TFT LCD panel. (2) Blending of each pixel using up to 4 source layers dependent on size of panel. (3) Each graphic layer can be placed with one pixel resolution in either axis. (4) Each graphic layer support RGB565 and RGB888 direct colors without alpha channel and BGRA8888 BGRA4444 ARGB1555 direct colors with an alpha channel and YUV422 format. (5) Each graphic layer support alpha blending with 8-bit resolution. This is a simplified version, only one primary plane, one framebuffer, one crtc, one connector and one encoder for TFT LCD panel. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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https://github.com/bbrezillon/linux-at91Dave Airlie authored
The following PR add support for 3 more atmel SoCs and for some missing features (new input formats and PRIME support). * 'drm-atmel-hlcdc-devel' of https://github.com/bbrezillon/linux-at91: drm: atmel-hlcdc: add support for sama5d4 SoCs drm: atmel-hlcdc: add support for at91sam9n12 SoC drm: atmel-hlcdc: add support for at91sam9x5 SoCs drm: atmel-hlcdc: add RGB565 and RGB444 output support drm: atmel-hlcdc: add the missing DRM_ATOMIC flag drm: atmel-hlcdc: add PRIME support
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- 19 Aug, 2015 1 commit
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
amdgpu and radeon changes for 4.3. Highlights: - Fiji support for amdgpu. - CGS support for amdgpu. This is a new driver internal cross-component API. - Initial GPU scheduler for amdgpu. Still disabled by default. - Lots of bug fixes and optimizations * 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (130 commits) drm/amdgpu: wait on page directory changes. v2 drm/amdgpu: Select BACKLIGHT_LCD_SUPPORT drm/radeon: Select BACKLIGHT_LCD_SUPPORT drm/amdgpu: cleanup sheduler rq handling v2 drm/amdgpu: move prepare work out of scheduler to cs_ioctl drm/amdgpu: fix unnecessary wake up drm/amdgpu: fix duplicated mapping invoke bug drm/amdgpu: drop bo_list_clone when no scheduler drm/amdgpu: disable GPU reset by default drm/amdgpu: fix type mismatch error drm/amdgpu: add reference for **fence drm/amdgpu: fix waiting for all fences before flipping drm/amdgpu: fix UVD return code checking drm/amdgpu: remove scheduler fence list v2 drm/amdgpu: remove amd_sched_wait_emit v2 drm/amdgpu: remove unecessary scheduler fence callbacks drm/amdgpu: fix scheduler fence implementation drm/amdgpu: don't grab dev->struct_mutex in pm functions drm/amdgpu: Don't take dev->struct_mutex in bo_force_delete drm/radeon: Don't take dev->struct_mutex in pm functions ...
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- 18 Aug, 2015 6 commits
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Boris Brezillon authored
Describe capabilities of the HLCDC IP found on sama5d4 SoCs and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
Describe capabilities of the HLCDC IP found on at91sam9n12 SoC and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
Describe capabilities of the HLCDC IP found on at91sam9x5 SoCs and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The HLCDC IP supports RGB565 and RGB444 output formats. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The atmel-hlcdc driver already supports atomic operations, add the missing DRM_ATOMIC flag to expose the atomic features to userspace. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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- 17 Aug, 2015 2 commits
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Bas Nieuwenhuizen authored
Pagetables can be moved and therefore the page directory update can be necessary for the current cs even if none of the the bo's are moved. In that scenario there is no fence between the sdma0 and gfx ring, so we add one. v2 (chk): rebased Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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Thierry Reding authored
Explicitly select BACKLIGHT_LCD_SUPPORT to satisfy the direct dependency of BACKLIGHT_CLASS_DEVICE. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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